AT91SAM7SE256B-CUR Atmel, AT91SAM7SE256B-CUR Datasheet - Page 122

IC ARM7 MCU FLASH 256K 128-LQFP

AT91SAM7SE256B-CUR

Manufacturer Part Number
AT91SAM7SE256B-CUR
Description
IC ARM7 MCU FLASH 256K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7SE256B-CUR

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
SAM7SE256
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
88
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
AT91SAM7SE256B
Supply Current (max)
60 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7SE256B-CUR
Manufacturer:
Atmel
Quantity:
10 000
20.2.4.2
Table 20-5.
122
Step
1
2
3
4
5
6
7
8
9
10
11
12
13
SAM7SE512/256/32 Preliminary
Programmer Action
Sets MODE and DATA signals
Clears NCMD signal
Waits for RDY low
Sets DATA signal in tristate
Clears NOE signal
Waits for NVALID low
Reads value on DATA Bus
Sets NOE signal
Waits for NVALID high
Sets DATA in output mode
Sets NCMD signal
Waits for RDY high
Read Handshaking
Read Handshake
For details on the read handshaking sequence, refer to
Figure 20-3.
MODE[3:0]
DATA[15:0]
NVALID
NCMD
Parallel Programming Timing, Read Sequence
NOE
RDY
1
Device Action
Waits for NCMD low
Latch MODE and DATA
Clears RDY signal
Waits for NOE Low
Sets DATA bus in output mode and outputs
the flash contents.
Clears NVALID signal
Waits for NOE high
Sets DATA bus in input mode
Sets NVALID signal
Waits for NCMD high
Sets RDY signal
2
Adress IN
ADDR
3
4
5
Z
6
Figure 20-3
7
Data OUT
8
9
and
DATA I/O
Input
Input
Input
Input
Tristate
Output
Output
Output
Output
X
Input
Input
Input
10
11
Table
X
12
6222F–ATARM–14-Jan-11
20-5.
13
IN

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