AT91SAM7SE256B-CUR Atmel, AT91SAM7SE256B-CUR Datasheet - Page 165

IC ARM7 MCU FLASH 256K 128-LQFP

AT91SAM7SE256B-CUR

Manufacturer Part Number
AT91SAM7SE256B-CUR
Description
IC ARM7 MCU FLASH 256K 128-LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM7SE256B-CUR

Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
EBI/EMI, I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
88
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Processor Series
SAM7SE256
Core
ARM7TDMI
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, USB
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
88
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
AT91SAM7SE256B
Supply Current (max)
60 uA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT91SAM7SE256B-CUR
Manufacturer:
Atmel
Quantity:
10 000
22.6.2
22.6.2.1
22.6.2.2
6222F–ATARM–14-Jan-11
Write Access
Write Access Type
Byte Write Access
Figure 22-5. Memory Connection for a 16-bit Data Path Device
Each chip select with a 16-bit data bus can operate with one of two different types of write
access:
This option is controlled by the BAT field in the SMC_CSR for the corresponding chip select.
See
Byte Write Access is used to connect 2 x 8-bit devices as a 16-bit memory page.
Figure 22-6
• Byte Write Access supports two byte write and a single read signal.
• Byte Select Access selects upper and/or lower byte with two byte select lines, and separate
• The signal A0/NLB is not used.
• The signal NWR1/NUB is used as NWR1 and enables upper byte writes.
• The signal NWR0/NWE is used as NWR0 and enables lower byte writes.
• The signal NRD enables half-word and byte reads.
read and write signals.
“SMC Chip Select Registers” on page
shows how to connect two 512K x 8-bit devices in parallel on NCS2 (BAT = 0)
SMC
D[15:8]
A[22:1]
D[7:0]
NCS2
NWE
NRD
NUB
NLB
SAM7SE512/256/32 Preliminary
196.
D[7:0]
D[15:8]
A[22:0]
Low Byte Enable
High Byte Enable
Write Enable
Output Enable
Memory Enable
165

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