LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 244

• Manufacturer Part Number: LFXP2-17E-5FN484I
• Description: FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
• Manufacturer: Lattice

Specifications of LFXP2-17E-5FN484I

• Number Of Macrocells: 17000
• Number Of Programmable I/os: 358
• Data Ram Size: 282624
• Supply Voltage (max): 1.26 V
• Maximum Operating Temperature: + 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.14 V
• Package / Case: FPBGA-484
• Number Of Logic Elements/cells: *
• Number Of Labs/clbs: *
• Total Ram Bits: 282624
• Number Of I /o: 358
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: *
• Operating Temperature: -40°C ~ 100°C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
• www.infinion.com, DDR SDRAM Data Sheets
• www.samsung.com, DDR SDRAM Data Sheets
• www.toshiba.com, DDR FCRAM Data Sheet
• www.fujitsu.com, DDR FCRAM Data Sheet
• RD1019,
• IPUG35,
Technical Support Assistance
Hotline: 1-800-LATTICE (North America)
e-mail:
Internet:
Revision History
February 2007
February 2009
June 2009
May 2007
[phone] (Outside North America)
[e-mail]
www.latticesemi.com
Date
DDR1 & DDR2 SDRAM Controller (Pipelined Versions) User’s Guide
QDR Memory Controller Reference Design
Version
01.0
01.1
01.2
01.3
Initial release.
Updated the port names on the input DDR block diagrams.
Updated text in DQS Transition Detect section under Memory Read
Implementation.
Updated DLL Compensated DQS Delay Elements text section.
Updated DQSDLL Update Control text section.
11-40
LatticeXP2 High-Speed I/O Interface
Change Summary