LFXP2-17E-5FN484I Lattice, LFXP2-17E-5FN484I Datasheet - Page 257
LFXP2-17E-5FN484I
Manufacturer Part Number
LFXP2-17E-5FN484I
Description
FPGA - Field Programmable Gate Array 17K LUTs 358 I/O Ins on DSP 1.2V -5 Spd
Manufacturer
Lattice
Datasheet
1.LFXP2-8E-5FTN256I.pdf
(341 pages)
Specifications of LFXP2-17E-5FN484I
Number Of Macrocells
17000
Number Of Programmable I/os
358
Data Ram Size
282624
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
282624
Number Of I /o
358
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
*
Operating Temperature
-40°C ~ 100°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice
Quantity:
175
Company:
Part Number:
LFXP2-17E-5FN484I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Power Estimation and Management
Lattice Semiconductor
for LatticeXP2 Devices
Importing a Trace Report File (TWR)
Post Trace TWR file can be imported into the Power Calculator project to estimate a design’s activity factors. Under
the File menu, select Open Trace Report File, browse to the TWR file location and select Open. All Freq. (MHz)
fields are then populated with the information from this file, as shown in Figure 12-15.
Figure 12-15. Importing a Trace Report File to a Power Calculator Project
Activity Factor and Toggle Rate
Activity Factor% (or AF%) is defined as the percentage of frequency (or time) that a signal is active or toggling of
the output. Most of the resources associated with a clock domain are running or toggling at some percentage of the
frequency at which the clock is running. Users must provide this value as a percentage under the AF% column in
the Power Calculator tool.
Another term used is the I/O Toggle Rate or the I/O Toggle Frequency. The AF% is applicable to the PFU, routing
and memory read write ports, etc. The activity of the I/Os is determined by the signals provided by the user (for
inputs) or as an output of the design (for outputs). Therefore, the rates at which I/Os toggle define their activity. The
Toggle Rate (or TR) in MHz of the output is defined by the following equation:
Toggle Rate (MHz) = 1/2 * f
* AF%
MAX
Users must provide the TR (MHz) value for the I/O instead of providing the Frequency and AF% in case of other
resources. The AF can be calculated for each routing resource, output or PFU. However, it involves long calcula-
tions. The general recommendation for a design occupying roughly 30% to 70% of the device is an AF% of 15% to
25%. This is an average value that can be seen most of the design. An accurate value for an activity factor depends
upon clock frequency, stimulus to the design and the final output.
12-13
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