IDT82P5088BBG IDT, Integrated Device Technology Inc, IDT82P5088BBG Datasheet - Page 24

• Manufacturer Part Number: IDT82P5088BBG
• Description: IC LIU T1/E1/J1 OCTAL 256PBGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of IDT82P5088BBG

• Includes: Integrated Clock Adapter
• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Power (watts): 2.57W
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-BBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -

3.3
Gain, Amplitude/Wave Shape Detector, Digital Tuning Controller, Adaptive
Equalizer, Data Slicer, CDR (Clock and Data Recovery), Jitter Attenuator,
Decoder and LOS/AIS Detector. Refer to Figure-8.
3.3.1
matching circuit or the external impedance matching circuit. If R_TERM[2]
Table-16 Impedance Matching for Receiver
FUNCTIONAL DESCRIPTION
IDT82P5088
RTIP
RRING
The receive path consists of Receive Internal Termination, Monitor
The impedance matching can be realized by the internal impedance
Cable Configuration
RECEIVE PATH
RECEIVE INTERNAL TERMINATION
E1/120 Ω
E1/75 Ω
T1
J1
termination
Receive
Internal
R
X
T
Line
X
Line
Note: 1. Common decoupling capacitor
A
B
2. Cp 0-560 (pF)
3. D1 - D8, Motorola - MBR0540T1;
•
•
2:1
1:1
•
•
R_TERM[2:0]
Adaptive Equalizer/
Figure-8 Receive Path Function Block Diagram
Monitor Gain
Cp
000
001
010
011
Internal Termination
R
Figure-9 Transmit/Receive Line Circuit
R
•
•
R
R
T
T
D6
D5
VDDAR
·
VDDAX
VDDAR
VDDAX
D2
D1
D8
D7
D4
D3
UNIVERSAL OCTAL T1/E1/J1 LIU WITH INTEGRATED CLOCK ADAPTER
·
·
·
Data Slicer
International Rectifier - 11DQ04 or 10BQ060
RTIP
RRING
TTIP
TRING
120 Ω
R
R
24
is set to ‘0’, the internal impedance matching circuit will be selected. In this
case, the R_TERM[1:0] bits (TERM, 32H...) can be set to choose 75 Ω, 100
Ω, 110 Ω or 120 Ω internal impedance of RTIPn/RRINGn. If R_TERM[2]
is set to ‘1’, the internal impedance matching circuit will be disabled. In this
case, the external impedance matching circuit will be used to realize the
impedance matching.
the cable for one channel.
ance matching for receiver.
Figure-9
Clock and
Recovery
Data
shows the appropriate external components to connect with
VDDAR
VDDAX
GNDA
GNDA
R_TERM[2:0]
1XX
0.1µF
0.1µF
Attenuator
Table-16
Jitter
•
•
External Termination
is the list of the recommended imped-
68µF
68µF
LOS/AIS
Detector
Decoder
3.3 V
3.3 V
1
1
February 5, 2009
120 Ω
100 Ω
110 Ω
75 Ω
R
R
LOS
RCLK
RDP
RDN