CR16MCS9VJE8 National Semiconductor, CR16MCS9VJE8 Datasheet - Page 106

• Manufacturer Part Number: CR16MCS9VJE8
• Description: 16-Bit Microcontroller IC
• Manufacturer: National Semiconductor

Specifications of CR16MCS9VJE8

• Controller Family/series: CR16X
• Core Size: 16 Bit
• Program Memory Size: 64K X 8 Flash
• Digital Ic Case Style: PQFP
• No. Of Pins: 80
• Mounting Type: Surface Mount
• Clock Frequency: 25MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

www.national.com
20.9.3
The buffer status, the buffer priority and the data length code
are controlled by manipulating the contents of the Buffer Sta-
tus/Control Register (CNSTAT). CPU and CR16CAN have
access to this register.
ST3 (DIR)
a. This condition indicates that the user wrote RX_NOT_ACTIVE to a buffer when the data copy process is still
b. RX_BUSYx indicates that coping is in progress at three possible times
c. This state indicates that the user wrote TX_NOT_ACTIVE to a transmit buffer which is scheduled for
d. TX_BUSYx indicates that a buffers is scheduled for transmission or is actively transmitting; it can be due to
e. This condition does not occur
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Buffer Status/Control Register (CNSTAT)
- data is copied for the first time RX_READY
- data is copied for the second time RX_FULL
- data is copied for the third or more time RX_OVERRUN
one of two cases:
- a message is pending for transmission or is currently transmitting
- an automated answer is pending for transmission or is currently transmitting
active.
transmission or is currently transmitting.
ST2
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
ST1
Table 26 Buffer Status Section of the CNSTAT Register
0
0
1
1
0
0
1
1
0
0
0
0
1
1
1
1
ST0 (BUSY)
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
RX_BUSY0
RX_BUSY1
106
ST[3:0]
15
DLC[3:0]
RX_BUSY2
(changes to TX_RTR after transmission)
(automatic response to a remote frame)
12 11
Buffer Status — The CNSTAT register has a
status section, which contains the status infor-
mation of the buffer as shown in Table26. This
section can be modified by CR16CAN.
The ST0 bits acts as a buffer busy indication.
When the BUSY bit is set, any write access to
the buffer is disabled with the exception of the
lower byte of the CNTSTAT register. The
CR16CAN sets this bit if the buffer data is cur-
rently copied from the hidden buffer or if a mes-
sage is scheduled for transmission or is
currently transmitting. The CR16CAN will al-
ways reset this bit on a status update.
Reserved for TX_BUSY1
Reserved for RX_BUSY
Reserved for TX_BUSY
RX_NOT_ACTIVE
TX_NOT_ACTIVE
TX_ONCE_RTR
Reserved
RX_OVERRUN
Buffer Status
RX_BUSY0
RX_BUSY1
RX_BUSY2
TX_BUSY0
TX_BUSY2
RX_READY
TX_ONCE
RX_FULL
TX_RTR
r/w
8 7
0
d
d
b
b
b
PRI[3:0]
c
a
e
4 3
ST[3:0]
0