CR16MCS9VJE8 National Semiconductor, CR16MCS9VJE8 Datasheet - Page 115

• Manufacturer Part Number: CR16MCS9VJE8
• Description: 16-Bit Microcontroller IC
• Manufacturer: National Semiconductor

Specifications of CR16MCS9VJE8

• Controller Family/series: CR16X
• Core Size: 16 Bit
• Program Memory Size: 64K X 8 Flash
• Digital Ic Case Style: PQFP
• No. Of Pins: 80
• Mounting Type: Surface Mount
• Clock Frequency: 25MHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

20.9.17 CAN Error Counter Register (CANEC)
The Can Error Counter Register contains the value of the
CAN Receive Error Counter and the CAN Transmit Error
Counter.
REC[7:0]
TEC[7:0]
20.9.18 CAN Error Diagnostic Register (CEDIAG)
The CAN Error Diagnostic (CEDIAG) register provides infor-
mation about the last detected error. CR16CAN is able to
identify the field within the CAN frame format, in which the er-
ror occurred, and it identifies the bit number of the erroneous
bit within the according frame field. The CPU has read only
access and all bits will be cleared upon reset.
EFID[3:0]
Table 36 Highest Priority Interrupt Code
Reserved DRIVE MON CRC STUFF TXE
CAN interrupt
TRANSMISSION
INTERMISSION
15
15
ERROR ECHO
ARBITRATION
ERROR DEL
Buffer 10
Buffer 12
Buffer 13
Buffer 14
Buffer 11
request
SUSPEND
BUS IDLE
ERROR
Field
ACK
EOF
SOF
14
(CICEN = FFFF)
REC[7:0]
CAN Receive Error Counter. The bits REC[7:0]
holds the value of the receive error counter.
CAN Transmit Error Counter. The bits TEC[7:0]
holds the value of the transmit error counter.
Error Field Identifier. The EDIAG bits 3...0 iden-
tify the frame field in which the last error oc-
curred. How the various frame fields are coded
into the EFID bits is shown in Table37.
Table 37 Error Field Identifier
1 3
IRQ
1
1
1
1
1
12
EFID3
0
0
0
0
0
0
0
0
1
1
8
IST3
11
0
0
r
r
1
1
1
1
1
EFID2
10
7
0
0
0
0
1
1
1
1
0
0
IST2
0
1
1
1
1
9
EBID[5:0]
TEC[7:0]
EFID1
IST1
0
0
1
1
0
0
1
1
0
0
1
0
0
1
1
4
EFID[3:0]
3
EFID0
IST0
0
1
0
1
0
1
0
1
0
1
1
0
1
0
1
0
0
115
EBID[5:0]
Assume the EFID resulted in 1110
value of 111001
field. To calculate the bit position of the error, the DLC of the
message needs to be known. For example, for a DLC of 8
data bytes, the bit counter starts with the value: 8 x 8 - 1 = 63;
so when EBID[5:0]=111001
63 - 57 = 6.
The following bits provide an information of the error type.
TXE
STUFF
CRC
MON
DRIVE
ARBITRATION
EXTENDED
R1/R0
DATA
Field
CRC
DLC
IDE
Table 37 Error Field Identifier
Error Bit Identifier. The EDIAG[9:4] bits contain
the number (position) of the incorrect bit within
the erroneous frame field. The bit number
starts with the value equal to the respective
frame field length minus one at the beginning of
each field and is decremented with each CAN
bit. Figure71 shows an example on how the
EBID is calculated.
Transmit Error. If set, this bit indicates that the
CR16CAN was an active transmitter at the time
the error occurred. If reset, the CR16CAN was
a receiver.
Stuff Error. if set, this bit indicates that a the bit
stuffing rule was violated at the time the error
occurred. Note that certain bit fields do no use
bit stuffing and therefore this bit may be ig-
nored in those.
CRC Error. if set, this bit indicates that the CRC
is invalid. This bit should only be used if the
EFID shows the code of the ACK field.
Monitor. This bit shows the bus value on the
CANRX pin as seen by the CR16CAN at the
time of the error.
Drive. This bit shows the output value on the
CANTX pin at the time of the error. Note that a
Figure 71. EBID Example
2
. This means that faulty field was the data
EFID3
1
1
1
1
1
1
r
2
data field
= 57, then the bit number was
r
EFID2
r
2
0
0
1
1
1
1
and the EBID showed a
r
r
EFID1
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incorrect
bit
r
1
1
0
0
1
1
EFID0
0
1
0
1
0
1