IPSR-VIDEO Altera, IPSR-VIDEO Datasheet - Page 60

• Manufacturer Part Number: IPSR-VIDEO
• Description: RENEWAL Of IPS-VIDEO
• Manufacturer: Altera
• Series: IP Suitesr

Specifications of IPSR-VIDEO

• Software Application: IP CORE, SUITES
• Supported Families: Arria GX, Cyclone II, HardCopy II, Stratix II
• Features: Common Avalon Streaming (Avalon-St) Interface And Avalon-St Video Protocol
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: na

4–2
Avalon-ST Video Protocol
Video and Image Processing Suite User Guide
Packets
f
For information about the supported clocked video interfaces, refer to the functional
description of the
on page
The MegaCore functions in the Video and Image Processing Suite use the Avalon-ST
Video protocol. The Avalon-ST Video protocol is a packet-oriented way to send video
and control data over Avalon-ST connections. Using the Avalon-ST Video protocol
allows the construction of image processing data paths which automatically configure
to changes in the format of the video being processed. This minimizes the external
control logic required to configure a video system.
The packets of the Avalon-ST Video protocol are split into symbols, where each
symbol represents a single piece of data (see the
packet types on a particular Avalon-ST interface the number of symbols sent in
parallel (that is, on one clock cycle) and the bit width of all symbols is fixed. The
symbol bit width and number of symbols sent in parallel defines the structure of the
packets.
The functions predefine the following two types of packet:
■
■
There are also seven packet types reserved for users, and seven packet types reserved
for future definition by Altera.
The packet type is defined by a 4-bit packet type identifier. This type identifier is the
first value of any packet. It is the symbol in the least significant bits of the interface.
Functions do not use any symbols in parallel with the type identifier (assigned X).
Video data packets containing only uncompressed video data
Control data packets containing the control data configure the cores for incoming
video data packets
5–17.
“Clocked Video Input” on page
Avalon Interface
5–10, and
“Clocked Video Output”
January 2011 Altera Corporation
Specifications). For all
Avalon-ST Video Protocol
Chapter 4: Interfaces