CS2000CP-DZZR Cirrus Logic Inc, CS2000CP-DZZR Datasheet - Page 10

• Manufacturer Part Number: CS2000CP-DZZR
• Description: IC General Purpose PLL Crystal
• Manufacturer: Cirrus Logic Inc
• Type: Fractional N Synthesizerr

Specifications of CS2000CP-DZZR

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Frequency - Max: 75MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 75MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1572 - KIT EVAL PROTOTYPING CS2300-CP598-1571 - KIT EVAL PROTOTYPING CS2000-CP598-1493 - BOARD EVAL GEN PURPOSE PLL DC598-1492 - BOARD EVAL GEN PURPOSE PLL DC598-1490 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1400-2; CS2000CP-DZZR

10
CONTROL PORT SWITCHING CHARACTERISTICS - SPI FORMAT
Inputs: Logic 0 = GND; Logic 1 = VD; C
Notes: 12.
CCLK Clock Frequency
CCLK Edge to CS Falling
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
Delay from Supply Voltage Stable to Control Port Ready
CCLK
CDIN
VD
13. Data must be held for sufficient time to bridge the transition time of CCLK.
14. For f
CS
t
spi
is only needed before first falling edge of CS after power is applied.
cclk
< 1 MHz.
t
dpor
t
spi
Parameter
Figure 3. Control Port Timing - SPI Format (Write Only)
t
t
r2
css
L
= 20 pF.
t
scl
t
t
dsu
f2
(Note
(Note
(Note
(Note
t
sch
t
dh
12)
13)
14)
14)
Symbol
f
t
t
t
t
t
ccllk
t
t
dpor
t
csh
sch
dsu
t
t
css
spi
scl
dh
r2
f2
Min
500
100
1.0
20
66
66
40
15
-
-
-
t
spi
= 0 at all other times.
t
csh
Max
100
100
6
-
CS2000-CP
-
-
-
-
-
-
-
DS761PP1
Unit
MHz
ns
µs
ns
ns
ns
ns
ns
ns
ns
µs