CS2000CP-DZZR Cirrus Logic Inc, CS2000CP-DZZR Datasheet - Page 27

• Manufacturer Part Number: CS2000CP-DZZR
• Description: IC General Purpose PLL Crystal
• Manufacturer: Cirrus Logic Inc
• Type: Fractional N Synthesizerr

Specifications of CS2000CP-DZZR

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Frequency - Max: 75MHz
• Divider/multiplier: Yes/Yes
• Voltage - Supply: 3.1 V ~ 3.5 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 10-MSOP, Micro10™, 10-uMAX, 10-uSOP
• Frequency-max: 75MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1572 - KIT EVAL PROTOTYPING CS2300-CP598-1571 - KIT EVAL PROTOTYPING CS2000-CP598-1493 - BOARD EVAL GEN PURPOSE PLL DC598-1492 - BOARD EVAL GEN PURPOSE PLL DC598-1490 - BOARD EVAL GEN PURPOSE PLL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 598-1400-2; CS2000CP-DZZR

DS761PP1
8. REGISTER DESCRIPTIONS
In I²C Mode all registers are read/write unless otherwise stated. In SPI mode all registers are write only. All “Re-
served” registers must maintain their default state to ensure proper functional operation. The default state of each
bit after a power-up sequence or reset is indicated by the shaded row in the bit decode table and in the
Quick Reference” on page
Control port mode is entered when the device recognizes a valid chip address input on its I²C/SPI serial control pins
and the EnDevCfg1 and EnDevCfg2 bits are set to 1.
8.1
8.1.1
8.1.2
8.2
8.2.1
8.2.2
Device4
Unlock
7
7
Device I.D. and Revision (Address 01h)
Device Control (Address 02h)
Device Identification (Device[4:0]) - Read Only
I.D. code for the CS2000.
Device Revision (Revision[2:0]) - Read Only
CS2000 revision level.
Unlock Indicator (Unlock) - Read Only
Indicates the lock state of the PLL.
PLL Input Sample Rate Indicator (FsDet[1:0]) - Read Only
Indicates the range of the frequency of CLK_IN relative to the frequency of SysClk. For audio applications,
this can be used to distinguish single-, double-, and quad-speed modes.
Device[4:0]
00000
REVID[2:0]
100
Unlock
0
1
FsDet[1:0]
00
01
10
11
Application:
Device3
FsDet1
6
6
Device
CS2000.
Revision Level
B2.
PLL Lock State
PLL is Locked.
PLL is Unlocked.
f
> 224.
96 to 224.
< 96.
Reserved.
“CLK_IN Frequency Detector” on page 14
26.
SysClk
Device2
FsDet0
/ f
CLK_IN
5
5
Reserved
Device1
4
4
Reserved
Device0
3
3
Revision2
Reserved
2
2
AuxOutDis
Revision1
1
1
CS2000-CP
ClkOutDis
Revision0
“Register
0
0
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