PIC16F724-E/MV Microchip Technology, PIC16F724-E/MV Datasheet - Page 231

7KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI, A

PIC16F724-E/MV

Manufacturer Part Number
PIC16F724-E/MV
Description
7KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI, A
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet

Specifications of PIC16F724-E/MV

Processor Series
PIC16F
Core
PIC
Program Memory Type
Flash
Program Memory Size
7 KB
Data Ram Size
192 B
Interface Type
I2C, SPI, AUSART
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
UQFN-40
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Eeprom Size
-
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 14x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Lead Free Status / Rohs Status
 Details
TABLE 23-8:
FIGURE 23-12:
© 2009 Microchip Technology Inc.
Standard Operating Conditions (unless otherwise stated)
Operating temperature
AD130* T
AD131
AD132* T
Note 1: The ADRES register may be read on the following T
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
*
A/D Data
A/D CLK
BSF ADCON0, GO
ADRES
Sample
T
These parameters are characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Sym.
AD
CNV
ACQ
ADIF
GO
AD134
SLEEP instruction to be executed.
Q4
A/D Clock Period
A/D Internal RC Oscillator
Period
Conversion Time (not including
Acquisition Time)
Acquisition Time
PIC16F72X A/D CONVERSION REQUIREMENTS
AD132
PIC16F72X A/D CONVERSION TIMING (NORMAL MODE)
-40°C ≤ T
Characteristic
(1)
A
≤ +125°C
(T
OSC
/2
(1)
)
7
OLD_DATA
Min.
1.0
1.0
6
AD131
PIC16F72X/PIC16LF72X
CY
Sampling Stopped
Typ†
10.5
5
2.0
1.0
cycle.
CY
is added before the A/D clock starts. This allows the
4
AD130
Max.
9.0
6.0
3
Units
T
μs
μs
μs
AD
2
T
ADCS<1:0> = 11 (ADRC mode)
Set GO/DONE bit to conversion
complete
OSC
-based
1
0
Conditions
NEW_DATA
DS41341E-page 231
DONE
1 T
CY
1 T
CY

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