HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 189
HH80556KH0364M S LAGD
Manufacturer Part Number
HH80556KH0364M S LAGD
Description
Manufacturer
Intel
Datasheet
1.HH80556KH0364M_S_LAGD.pdf
(434 pages)
Specifications of HH80556KH0364M S LAGD
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
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Register Description—Intel
3.9.2.1
Table 59.
3.9.2.2
July 2009
Order Number: 318378-005US
Note that throttling decreases performance and increases memory access latency in
heavy traffic. Extremely low values (below 10h) will lead to dramatically increased
latency for reads which could result in requestor timeouts, etc.
Note that throttling must always be disabled for RCVEN calibration.
GBLACT: Global Activation Throttle Register
This register contains the limit for Global Activation throttle control.
Global Activation Throttling as Function of Global Activation Throttling Limit
(GBLACTM) Register Fields
THRTSTS[1:0]: Throttling Status Register
Records the global activation throttle status and internal thermal throttling value for
channels 0/1
Device:
Function:
Offset:
7:0
Bit
GBLACT.GBLACTM
Range (0…168)
Attr
RW
®
100
128
150
168
16
32
64
96
0
1
2
5100 MCH Chipset
16
1
60h
Default
0h
GBLACTLM: Global Activation Throttle Limit
This field controls the activation of Global throttling based on the number of
activations sampled per rank on each channel.
If the number of activations in the global throttling window exceeds the number
indicated by the GBLACTLM filed in this register, then global throttling is started by
setting the THRTSTS[1:0].GBLTHRT bit for the respective channel and the Global
activation throttling logic to use the THRTHIGH register for throttling.
The granularity of this field is 65536 or 16 activations. Refer to
Activation Throttling as Function of Global Activation Throttling Limit (GBLACTM)
Register Fields.”
If Software sets this value greater than 168, the chipset will cap the GBLACTLM
field to 168.
Number of Activations
(unlimited activations)
No Throttling
(100% BW)
11010048
1048576
2097152
4194304
6291456
6553600
8388608
9830400
131072
65536
Description
Intel
®
5100 Memory Controller Hub Chipset
Table 59, “Global
Datasheet
189
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