HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 323

• Manufacturer Part Number: HH80556KH0364M S LAGD
• Manufacturer: Intel

Specifications of HH80556KH0364M S LAGD

• Rad Hardened: No
• Lead Free Status / RoHS Status: Compliant

Functional Description—Intel
5.15
5.15.1
Table 100.
July 2009
Order Number: 318378-005US
System
Initialization
Task
Chipset Hardware
BIOS
DMA Engine
Device Software
Driver
I/O Device
Hardware
I/O Device
Software Driver
Other Restrictions,
Issues, Notes
state) and actively using DMA Engine. Depending on whether DMA Engine is used
under an OS environment, this imposes different requirements on the device and
platform implementation.
There is a DMA Engine device driver and the host OS can power manage the DMA
Engine device through this driver. The software implementation must make sure that
the appropriate power management dependencies between the DMA Engine device and
its client I/O devices are captured and reported to the operating system. This is to
ensure that the operating system does not put the DMA Engine device to a low power
(D1, D2 or D3) state while any of its client I/O devices are fully powered on (D0 state)
and actively using DMA Engine.
For example, the operating system might attempt to transition the DMA Engine device
into the D3 device power state while putting the system into the S4 (hibernate) system
power state. In that process, it must not transition the DMA Engine device into the D3
state before transitioning all client I/O devices into the D3 power state. In the same
way, when the system resumes from the S4 state, the operating system must
transition the DMA Engine device from D3 to the D0 state before transitioning its client
I/O devices from D3 to the D0 state.
Implementation Requirements
This section specifies dependencies on the various programming components for
various tasks.
Software Model Dependencies
Table 100
Software Model Dependencies (Sheet 1 of 3)
Realm
lists dependencies for the Software Model.
®
5100 MCH Chipset
Note:
• Initialize DMA Engine registers with specified default values
• Mark DMA Engine as an Integrated Device (PCI base class 8h, subclass/interface 80h)
• Treat DMA Engine device as any other PCI device.
• Program the APIC_ID_TAG_MAP register
• none (not loaded yet)
• Does nothing - waits for I/O Software Driver to configure and enable the I/O device.
• none (not loaded yet)
so that the OS will load the DMA Engine device driver.
DMA Engine services exposed as a Root Complex Integrated Device.
Requirements
Intel
®
5100 Memory Controller Hub Chipset
Datasheet
323