HH80556KH0364M S LAGD Intel, HH80556KH0364M S LAGD Datasheet - Page 382
HH80556KH0364M S LAGD
Manufacturer Part Number
HH80556KH0364M S LAGD
Description
Manufacturer
Intel
Datasheet
1.HH80556KH0364M_S_LAGD.pdf
(434 pages)
Specifications of HH80556KH0364M S LAGD
Rad Hardened
No
Lead Free Status / RoHS Status
Compliant
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Table 128.
6.2.4
Table 129.
Intel
Datasheet
382
Differential Signals
V
I
I
C
Notes:
1.
2.
3.
V
V
IDLE-DELTA
V
V
V
V
I
Z
Z
Notes:
1.
2.
IH
IL
TX-SHORT
ID(dc)
IO
TX-DIF-DC
TX-CM-DC-ACTIVE-
TX-CM-DC-LINE-DELTA
TX-IDLE-DIFFp
TX-RCV-DETECT
TX-DC-CM
TX-DIFF-DC
TX-DC
®
5100 Memory Controller Hub Chipset
Symbol
Symbol
Input voltage for all pins is limited to a maximum of 2.3 V.
VCCDDR/2=1.7/2=850 mV
C
A test load is not required to be associated with the values in the table.
Specified at the measurement point into a timing and voltage compliance test load and measured over any 250
consecutive TX UIs
IO
is the input/output capacitance for DQ/DQS and output capacitance for CMD/ADDR/CLK.
DDR2 DC Characteristics (Sheet 2 of 2)
PCI Express*/ESI Interface
PCI Express*/ESI Differential Transmitter (TX) Output DC Characteristics
DC Differential Input Voltage
Input Leakage Current (High)
Input Leakage Current (Low)
Input/Output Capacitance
Differential Peak-to-peak Output
Voltage
Absolute Delta of DC Common
Mode Voltage During L0 and
Electrical Idle
Absolute Delta of DC Common
Mode Voltage between D+ and
D-
Electrical Idle Differential Peak
Output Voltage
Amount of Voltage Change
Allowed during Receiver
Detection
TX DC Common Mode Voltage
Short Circuit Current Limit
DC Differential TX Impedance
Transmitter DC Impedance
Parameter
Parameter
Min.
Min.
0.2
2.0
0.8
80
40
0
0
0
-
-
Intel
®
5100 MCH Chipset—Electrical Characteristics
Nom.
Nom.
100
-
-
-
-
Order Number: 318378-005US
Max.
Max.
100
600
120
2.5
1.2
3.6
10
10
25
20
90
-
Unit
Unit
mV
mV
mV
mV
mA
µA
µA
pF
Ω
Ω
V
V
V
July 2009
Notes
Notes
3
2
2
2
2
2
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