ISP1760ET,557 NXP Semiconductors, ISP1760ET,557 Datasheet - Page 39

• Manufacturer Part Number: ISP1760ET,557
• Manufacturer: NXP Semiconductors

Specifications of ISP1760ET,557

• Package Type: TFBGA
• Pin Count: 128
• Lead Free Status / RoHS Status: Compliant

NXP Semiconductors
Table 26.
Table 27.
Table 28.
Table 29.
ISP1760_4
Product data sheet
Bit
31 to 0
Bit
31 to 0
Bit
31 to 0
Bit
31 to 0
Symbol
INT_PTD_SKIP
_MAP[31:0]
ISO PTD Skip Map register (address 0134h) bit description
ISO PTD Last PTD register (address 0138h) bit description
INT PTD Done Map register (address 0140h) bit description
INT PTD Skip Map register (address 0144h) bit description
Symbol
ISO_PTD_LAST
_PTD[31:0]
Symbol
ISO_PTD_SKIP
_MAP[31:0]
Symbol
INT_PTD_DONE_
MAP[31:0]
8.2.10 INT PTD Done Map register
8.2.11 INT PTD Skip Map register
8.2.9 ISO PTD Last PTD register
When a bit in the PTD Skip Map is set to logic 1 that PTD will be skipped although its V bit
may be set. The information in that PTD is not processed. For example, NextPTDPointer
will not affect the order of processing of PTDs. The Skip bit should not normally be set on
the position indicated by NextPTDPointer.
Table 27
Once the LastPTD bit corresponding to a PTD is set, this will be the last PTD processed
(checking V = 1) in that PTD category. Subsequently, the process will restart with the first
PTD of that group. This is useful to reduce the time in which all the PTDs, the respective
memory space, would be checked, especially if only a few PTDs are defined. The
LastPTD bit must be normally set to a higher position than any other position indicated by
the NextPTDPointer from an active PTD.
The bit description of the register is given in
This register represents a direct map of the done status of the 32 PTDs. The bit
corresponding to a certain PTD will be set to logic 1 as soon as that PTD execution is
completed. Reading the Done Map register will clear all the bits that are set to logic 1, and
the next reading will reflect the updated status of new executed PTDs.
Table 29
Access
R/W
Access
R/W
Access
R/W
Access
R
shows the bit description of the ISO PTD Last PTD register.
shows the bit description of the INT PTD Skip Map register.
Value
FFFF FFFFh
Value
0000 0000h
Value
FFFF FFFFh
Value
0000 0000h INT PTD Done Map: Done map for each of the 32 PTDs for the
Rev. 04 — 4 February 2008
Description
ISO PTD last PTD: Last PTD of the 32 PTDs is indicated by the 32
bitmap.
1h — One PTD in ISO
2h — Two PTDs in ISO
4h — Three PTDs in ISO
Description
INT PTD Skip Map: Skip map for each of the 32 PTDs for the INT
transfer
Description
INT transfer
Description
ISO PTD Skip Map: Skip map for each of the 32 PTDs for the
ISO transfer.
Table
Embedded Hi-Speed USB host controller
28.
© NXP B.V. 2008. All rights reserved.
ISP1760
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