ISP1760ET,557 NXP Semiconductors, ISP1760ET,557 Datasheet - Page 92

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ISP1760ET,557

Manufacturer Part Number
ISP1760ET,557
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1760ET,557

Package Type
TFBGA
Pin Count
128
Lead Free Status / RoHS Status
Compliant
NXP Semiconductors
ISP1760_4
Product data sheet
14.1.2 Register read
14.1.3 Register access
Table 94.
T
Symbol
V
t
t
t
t
t
V
t
t
t
t
t
su12
su22
w12
d12
d22
su12
su22
w12
d12
d22
amb
Fig 16. Register read
Fig 17. Register access
CC(I/O)
CC(I/O)
WR_N
= 40 C to +85 C; unless otherwise specified.
CS_N
RD_N
= 1.65 V to 1.95 V
= 3.3 V to 3.6 V
A[17:1]
DATA
CS_N
Register read
RD_N
Parameter
address set-up time before RD_N LOW
CS_N set-up time before RD_N LOW
RD_N pulse width
data valid time after RD_N LOW
data valid time after RD_N HIGH
address set-up time before RD_N LOW
CS_N set-up time before RD_N LOW
RD_N pulse width
data valid time after RD_N LOW
data valid time after RD_N HIGH
Rev. 04 — 4 February 2008
t
su22
t
su12
t
WHRL
t
address 01
d12
t
w12
t
d22
t
RHRL
Embedded Hi-Speed USB host controller
Min
0
0
> t
-
-
0
0
> t
-
-
d12
d12
t
RHWL
address 02
Max
-
-
-
35
1
-
-
-
22
1
t
WHWL
© NXP B.V. 2008. All rights reserved.
ISP1760
004aaa524
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
004aaa983
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