ALXD800EEXJ2VD C3 AMD (ADVANCED MICRO DEVICES), ALXD800EEXJ2VD C3 Datasheet - Page 378

• Manufacturer Part Number: ALXD800EEXJ2VD C3
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ALXD800EEXJ2VD C3

• Operating Temperature (min): 0C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Lead Free Status / RoHS Status: Compliant

6.6.20.10 VGA Color Don’t Care
Index
Type
Reset Value
6.6.20.11 VGA Bit Mask
Index
Type
Reset Value
6.6.21
The attribute controller registers are accessed by writing an index value to the Attribute Controller Index register (3C0h) and
reading or writing the register using the Attribute Controller Data register (3C0h for writes, 3C1h for reads).
378
00h-0Fh
Bit
7:4
Bit
7:0
Index
3
2
1
0
10h
11h
12h
13h
14h
--
Attribute Controller Registers
Name
RSVD
CM_PR3
CM_PR2
CM_PR1
CM_PR0
Name
BT_MSK
07h
R/W
xxh
08h
R/W
xxh
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
33234H
Table 6-57. Attribute Controller Registers Summary
Register
Attribute Controller Index/Data/Data
EGA Palette
Attribute Mode Control
Overscan Color
Color Plane Enable
Horizontal Pel Panning
Color Select
Description
Reserved.
Compare Map 3. This bit enables (bit = 1) or excludes (bit = 0) map 3 from participating
in a color compare operation.
Compare Map 2. This bit enables (bit = 1) or excludes (bit = 0) map 2 from participating
in a color compare operation.
Compare Map 1. This bit enables (bit = 1) or excludes (bit = 0) map 1 from participating
in a color compare operation.
Compare Map 0. This bit enables (bit = 1) or excludes (bit = 0) map 0 from participating
in a color compare operation.
Description
Bit Mask. The bit mask is used to enable or disable writing to individual bits in each map.
A 1 in the bit mask allows a bit to be updated, while a 0 in the bit mask writes the contents
of the data latches back to memory, effectively protecting that bit from update. The data
latches must be set by doing a frame buffer read in order for the masking operation to
work properly. The bit mask is used in write modes 0, 2, and 3.
VGA Color Don’t Care Register Bit Descriptions
VGA Bit Mask Register Bit Descriptions
Display Controller Register Descriptions
AMD Geode™ LX Processors Data Book
Reset Value
xxh
xxh
xxh
xxh
xxh
xxh
xxh
Reference
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