IDT82V3285DQGT IDT, Integrated Device Technology Inc, IDT82V3285DQGT Datasheet - Page 76

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IDT82V3285DQGT

Manufacturer Part Number
IDT82V3285DQGT
Description
IC PLL WAN STRATUM 100-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Clock Generatorr
Datasheet

Specifications of IDT82V3285DQGT

Input
CMOS, LVDS, PECL, TTL
Output
CMOS, LVDS, PECL, TTL
Frequency - Max
622.08MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Frequency-max
622.08MHz
Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
82V3285DQGT
IN3_IN4_HF_DIV_CNFG - Input Clock 3 & 4 High Frequency Divider Configuration
Programming Information
IDT82V3285
Address: 18H
Type: Read / Write
Default Value: 00XXXX00
7 - 6
5 - 2
1 - 0
IN4_DIV1
Bit
7
IN4_DIV[1:0]
IN3_DIV[1:0]
IN4_DIV0
Name
-
6
These bits determine whether the HF Divider is used and what the division factor is for IN4 frequency division:
00: Bypassed. (default)
01: Divided by 4.
10: Divided by 5.
11: Reserved.
Reserved.
These bits determine whether the HF Divider is used and what the division factor is for IN3 frequency division:
00: Bypassed. (default)
01: Divided by 4.
10: Divided by 5.
11: Reserved.
5
-
4
-
76
3
-
Description
2
-
IN3_DIV1
1
IN3_DIV0
April 11, 2007
0
WAN PLL

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