IDT82V3285DQGT IDT, Integrated Device Technology Inc, IDT82V3285DQGT Datasheet - Page 96

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IDT82V3285DQGT

Manufacturer Part Number
IDT82V3285DQGT
Description
IC PLL WAN STRATUM 100-TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Type
PLL Clock Generatorr
Datasheet

Specifications of IDT82V3285DQGT

Input
CMOS, LVDS, PECL, TTL
Output
CMOS, LVDS, PECL, TTL
Frequency - Max
622.08MHz
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Frequency-max
622.08MHz
Function
Wan PLL
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Package Type
TQFP
Pin Count
100
Mounting
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
82V3285DQGT
7.2.5
INPUT_VALID1_STS - Input Clocks Validity 1
INPUT_VALID2_STS - Input Clocks Validity 2
REMOTE_INPUT_VALID1_CNFG - Input Clocks Validity Configuration 1
Programming Information
IDT82V3285
Address: 4AH
Type: Read
Default Value: 00000000
Address: 4BH
Type: Read
Default Value: XX000000
Address: 4CH
Type: Read / Write
Default Value: 11111111
7 - 6
5 - 2
1 - 0
7 - 3
1 - 0
7 - 6
5 - 2
1 - 0
Bit
Bit
Bit
2
7
7
7
-
-
-
T0 / T4 DPLL INPUT CLOCK SELECTION REGISTERS
INn_VALID
Name
Name
Name
INn
IN5
-
-
-
-
-
-
6
6
6
-
-
-
Reserved.
This bit indicates the validity of the corresponding INn. Here n is any of 4 to 1.
0: Invalid. (default)
1: Valid.
Reserved.
Reserved.
This bit indicates the validity of IN5.
0: Invalid. (default)
1: Valid.
Reserved.
Reserved.
This bit controls whether the corresponding INn is allowed to be locked for automatic selection. Here n is any one of 4 to 1.
0: Enabled.
1: Disabled. (default)
Reserved.
IN4_VALID
IN4
5
5
5
-
IN3_VALID
IN3
4
4
4
-
96
IN2_VALID
IN2
3
3
3
-
Description
Description
Description
IN1_VALID
IN1
IN5
2
2
2
1
1
1
-
-
-
April 11, 2007
0
0
0
-
-
-
WAN PLL

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