EP3SL150F1152C3N Altera, EP3SL150F1152C3N Datasheet - Page 335

IC STRATX III FPGA 150K 1152FBGA

EP3SL150F1152C3N

Manufacturer Part Number
EP3SL150F1152C3N
Description
IC STRATX III FPGA 150K 1152FBGA
Manufacturer
Altera
Series
Stratix® IIIr

Specifications of EP3SL150F1152C3N

Number Of Logic Elements/cells
142500
Number Of Labs/clbs
5700
Total Ram Bits
6390
Number Of I /o
744
Voltage - Supply
0.86 V ~ 1.15 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1152-FBGA
For Use With
544-2568 - KIT DEVELOPMENT STRATIX III
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2408
EP3SL150F1152C3NES

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Chapter 11: Configuring Stratix III Devices
Configuration Features
Configuration Features
Table 11–3. Stratix III Configuration Features
© March 2011 Altera Corporation
FPP
Fast AS
PS
JTAG
Notes to
(1) In these modes, the host system must send a DCLK that is ×4 the data rate.
(2) Remote system upgrade is only available in the fast AS configuration scheme. Only remote update mode is supported when using the fast AS
Configuration
Scheme
configuration scheme. Local update mode is not supported.
Table
f
f
11–3:
MAX II device or a microprocessor with
flash memory
Serial configuration device
MAX II device or a microprocessor with
flash memory
Download cable
MAX II device or a microprocessor with
flash memory
Download cable
Stratix III devices offer design security, decompression, and remote system upgrade
features. Design security using configuration bitstream encryption is available in
Stratix III devices, which protects your designs. Stratix III devices can receive a
compressed configuration bitstream and decompress this data in real-time, reducing
storage requirements and configuration time. You can make real-time system
upgrades from remote locations of your Stratix III designs with the remote system
upgrade feature.
Table 11–3
configuration scheme.
If your system already contains a common flash interface (CFI) flash memory, you can
use it for the Stratix III device configuration storage as well. The MAX II parallel flash
loader (PFL) feature in MAX II devices provides an efficient method to program CFI
flash memory devices through the JTAG interface, and the logic to control
configuration from the flash memory device to the Stratix III device. Both PS and FPP
configuration modes are supported using the PFL feature.
For more information about PFL, refer to
Loader with the Quartus II
For more information about programming Altera serial configuration devices, refer to
“Programming Serial Configuration Devices” on page
Configuration Method
summarizes which configuration features you can use in each
Software.
Decompression
v
AN 386: Using the MAX II Parallel Flash
v
v
v
(1)
Design Security
11–25.
v
Stratix III Device Handbook, Volume 1
v
v
v
(1)
Remote System
Upgrade
v
(2)
11–3

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