CY7C67300-100AXI Cypress Semiconductor Corp, CY7C67300-100AXI Datasheet - Page 7
![IC USB HOST/PERIPH CNTRL 100LQFP](/photos/6/70/67051/428-100-tqfp_14x14x1_4_sml.jpg)
CY7C67300-100AXI
Manufacturer Part Number
CY7C67300-100AXI
Description
IC USB HOST/PERIPH CNTRL 100LQFP
Manufacturer
Cypress Semiconductor Corp
Series
EZ-Host™r
Type
Host Programmable Embedded USBr
Datasheet
1.CY7C67300-100AXI.pdf
(99 pages)
Specifications of CY7C67300-100AXI
Package / Case
100-LQFP
Applications
USB Host/Peripheral Controller
Core Processor
CY16
Program Memory Type
ROM (8 kB)
Controller Series
CY7C673xx
Ram Size
16K x 8
Interface
SPI Serial, USB, HPI
Number Of I /o
32
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Supply Current
80 mA
Operating Supply Voltage
3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
428-1865
CY7C67300-100AXI
CY7C67300-100AXI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C67300-100AXI
Manufacturer:
ATMEL
Quantity:
210
Company:
Part Number:
CY7C67300-100AXI
Manufacturer:
CYPRESS
Quantity:
246
Company:
Part Number:
CY7C67300-100AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C67300-100AXI
Manufacturer:
CYPRESS
Quantity:
20 000
Company:
Part Number:
CY7C67300-100AXIT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Figure 4
8-bit RAM to the EZ-Host external memory interface. In 8-bit
mode, up to 512K bytes of external ROM or RAM are supported.
Figure 4. Interfacing up to 512k × 8 for External Code/Data
General Purpose IO Interface (GPIO)
EZ-Host has up to 32 GPIO signals available. Several other
optional interfaces use GPIO pins as well and may reduce the
overall number of available GPIOs.
GPIO Description
All Inputs are sampled asynchronously with state changes
occurring at a rate of up to two 48 MHz clock cycles. GPIO pins
are latched directly into registers, a single flip-flop.
Unused Pin Descriptions
Ensure to tristate unused USB pins with the D+ line pulled high
through the internal pull up resistor and the D– line pulled low
through the internal pull down resistor.
Configure unused GPIO pins as outputs so they are driven low.
UART Interface
EZ-Host has a built in UART interface. The UART interface
supports data rates from 900 to 115.2K baud. It can be used as
a development port or for other interface requirements. The
UART interface is exposed through GPIO pins.
UART Features
■
■
UART Pins.
Table 7. UART Interface Pins
Document #: 38-08015 Rev. *J
Supports baud rates of 900 to 115.2K
8-N-1
Up to 512k x 8 External Code/Data (Page Mode)
CY7C67300
illustrates the interface for connecting an 8-bit ROM or
Pin Name
EZ-Host
nXMEMSEL
TX
RX
A[18:0]
D[7:0]
nWR
nRD
Pin Number
A[18:0]
D[7:0]
CE
WE
OE
External Memory Array
Up to 512k x8
42
43
I
EZ-Host provides a master-only I
EEPROMs. The serial EEPROM can be used to store application
specific code and data. Use the I
of EEPROM, it is not a general I
interface is a BIOS implementation and is exposed through
GPIO pins. Refer to the BIOS documentation for additional
details on this interface.
I
■
■
I
Table 8. I
Serial Peripheral Interface
EZ-Host provides a SPI interface for added connectivity. EZ-Host
may be configured as either an SPI master or SPI slave. The SPI
interface can be exposed through GPIO pins or the External
Memory port.
SPI Features
■
■
■
■
■
■
■
■
■
■
■
■
■
2
2
2
C EEPROM Features
C EEPROM Pins
C EEPROM Interface
Supports EEPROMs up to 64 KB (512K bit)
Auto-detection of EEPROM size
Master or slave mode operation
DMA block transfer and PIO byte transfer modes
Full duplex or half duplex data communication
8-byte receive FIFO and 8-byte transmit FIFO
Selectable master SPI clock rates from 250 kHz to 12 MHz
Selectable master SPI clock phase and polarity
Slave SPI signaling synchronization and filtering
Slave SPI clock rates up to 2 MHz
Maskable interrupts for block and byte transfer modes
Individual bit transfer for non-byte aligned serial communi-
cation in PIO mode
Programmable delay timing for the active/inactive master SPI
clock
Auto or manual control for master mode slave select signal
Complete access to internal memory
Pin Name
SCK
SDA
SCK
SDA
2
C EEPROM Interface Pins
LARGE EEPROM
SMALL EEPROM
Pin Number
39
40
40
39
2
2
C interface for loading code out
C interface. The I
2
C interface for external serial
GPIO Number
CY7C67300
GPIO31
GPIO30
GPIO30
GPIO31
2
Page 7 of 99
C EEPROM
[+] Feedback