CY7C67300-100AXI Cypress Semiconductor Corp, CY7C67300-100AXI Datasheet - Page 85

• Manufacturer Part Number: CY7C67300-100AXI
• Description: IC USB HOST/PERIPH CNTRL 100LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-Host™r
• Type: Host Programmable Embedded USBr

Specifications of CY7C67300-100AXI

• Package / Case: 100-LQFP
• Applications: USB Host/Peripheral Controller
• Core Processor: CY16
• Program Memory Type: ROM (8 kB)
• Controller Series: CY7C673xx
• Ram Size: 16K x 8
• Interface: SPI Serial, USB, HPI
• Number Of I /o: 32
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Temperature Range: - 40 C to + 85 C
• Supply Current: 80 mA
• Operating Supply Voltage: 3.3 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4640 - KIT MASS STORAGE REF DESIGNCY3663 - KIT DEV EZ-OTG/EZ-HOST
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-1865; CY7C67300-100AXI

AC Timing Characteristics
Reset Timing
Table 135. Reset Timing Parameters
Clock Timing
Table 136. Clock Timing Parameters
Document #: 38-08015 Rev. *J
Notes
Parameter
t
t
Parameter
f
v
t
t
t
t
t
Duty Cycle
11. Clock is 12 MHz nominal.
12.
RESET
IOACT
CLK
CLK
HIGH
LOW
RISE
FALL
XINH
v
XINH is required to be 3.0 V to obtain an internal 50/50 duty cycle clock.
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nRESET Pulse Width
nRESET HIGH to nRD or nWRx active
Clock Frequency
Clock Input High
(XTALOUT left floating)
Clock Period
Clock High Time
Clock Low Time
Clock Rise Time
Clock Fall Time
nRESET
nRD or nWRL or nWRH
XTALIN
t
HIGH
Description
Description
t
CLK
t
RESET
Clock Timing
Reset Timing
t
t
FALL
LOW
83.17
Min
Min
200
1.5
16
36
36
45
t
IOACT
Typical
Typical
83.33
12.0
3.0
t
RISE
Max
Max
83.5
3.6
5.0
5.0
44
44
55
CY7C67300
clocks
MHz
Unit
Unit
µs
ns
ns
ns
ns
ns
%
V
Page 85 of 99
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