MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 298

• Manufacturer Part Number: MC68030FE25C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: CQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

8.2.3 Completing the Bus Cycles with RTE
MOTOROLA
to rerun the bus cycles during execution of the RTE instruction that terminates
the exception handler. This method cannot be used to recover from address
the fault, such as a non-resident page in a virtual memory system, has been
Another method of completing a faulted bus cycle is to allow the processor
errors. The RTE instruction is always executed. Unless the handler routine
corresponding rerun bit was not cleared by the software, the RTE reruns the
associated instruction prefetch. The fault occurs again unless the cause of
corrected. If the rerun bit is set for a stage of the pipe and the fault bit is
cleared, the associated prefetch cycle may or may not be run by the RTE
The read-modify-write operations of the MC68030 can also be completed by
the RTE instruction that terminates the handler routine. The rerun operation,
entire instruction. If the cause of the error has been corrected, the handler
does not need to emulate the instruction but can leave the DF bit set and
execute the RTE instruction.
tions exists since one portion of the write operation could take place and the
has corrected the error and cleared the fault (and cleared the rerun and DF
bits of the SSW), the RTE instruction can complete the bus cycle(s). If the DF
bit is still set at the time of the RTE execution, the faulted data cycle is rerun
by the RTE instruction. If the fault bit for a stage of the pipe is set and the
instruction (depending on whether the stage is required).
the processor creates a new stack frame on the supervisor stack after de-
cessing starts in the normal manner.
executed by the RTE instruction with the DF bit of the SSW set, reruns the
Systems programmers and designers should be aware that the MMU of the
MC68030 treats any bus cycle with RMC asserted as a write operation for
protection checking, regardless of the state of R/W signal. Otherwise, the
potential for partially destroying system pointers with CAS and CAS2 instruc-
remainder be aborted by a bus error.
If a fault occurs when the RTE instruction attempts to rerun the bus cycle(s),
allocating the previous frame, and address error or bus error exception pro-
MC68030 USER'S MANUAL
8-31
8