MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 352
MC68030FE25C
Manufacturer Part Number
MC68030FE25C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Specifications of MC68030FE25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
CQUAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68030FE25C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68030FE25C
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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MOTOROLA
9,6 M C 6 8 0 3 0 A N D M C 6 8 8 5 1 M M U
following functions of the MC68851 are not available in the MC68030 MMU:
The MC68851 paged memory management unit provides memory manage-
combination. However, in a program for the MC68030, the following instruc-
tions must be avoided or emulated in the exception routine for F-line un-
VAL, SCC, BAD, BACx, DRP, and AC). Additionally, the effective addressing
ment for the MC68020 as a coprocessor. The on-chip MMU of the MC68030
provides many of the features of the MC68020/MC68851 combination. The
In addition, the following features of the MC68030 MMU differ from the
MC68020/MC68851 pair:
In general, the MC68030 is program compatible with the MC68020/MC68851
implemented instructions: PVALID, PFLUSHR, PFLUSHS, PBcc, PDBcc, PScc,
PTRAPcc, PSAVE, PRESTORE, and PMOVE for unsupported registers (CAL,
modes supported on the MC68851 that are not emulated by the MC68030
must be simulated or avoided.
• Access Levels
• Breakpoint Registers
• Root Pointer Table
• Aliases for Tasks
• Lockable Entries in the ATC
• ATC Entries Defined as Shared Globally
• 22-Entry ATC
• Reduced Instruction Set
• Only Control-Alterable Addressing Modes Supported for MMU Instruc-
tions
M068030 USER'S MANUAL
D I F F E R E N C E S
9-51
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