MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 81

• Manufacturer Part Number: MC68030FE25C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: CQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

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2.7 M 6 8 0 0 0 F A M I L Y A D D R E S S I N G C O M P A T I B I L I T Y
2.8 OTHER D A T A S T R U C T U R E S
2.8.1 S y s t e m S t a c k
thus, while software can be easily migrated in an upward compatible direc-
tion, only nonscaled addressing is supported in a downward fashion. If the
tions, they do not decode invalid encodings of the extension words as
Address register seven (A7) is used as the system stack pointer (SP). Any of
the three system stack registers is active at any one time. The M and S bits
to another in an upward compatible fashion. The user object code of each
extension word(s) are encoded with the information that allows the MC68020/
ward and downward compatible across all processors in the product line.
scaling factor would be ignored and not access the desired memory address.
The earlier microprocessors have no knowledge of the extension word for-
exceptions.
Stacks and queues are widely used data structures. The MC68030 implements
a system stack and also provides instructions that support the use of user
stacks and queues.
of the status register determine which stack pointer is used. When S = 0
the active system stack pointer, and the master and interrupt stack pointers
stack pointer. When S=1 and M = 0 , the interrupt stack pointer (ISP) is the
active system stack pointer. This mode is the MC68030 default mode after
Programs can be easily transported from one member of the M68000 Family
early member of the family is upward compatible with newer members and
can be executed on the newer microprocessor without change. The address
MC68030 to distinguish the new address extensions to the basic M68000
Family architecture. The address extension words for the early MC68000/
MC68008/MC68010 microprocessors and for the newer 32-bit MC68020/
MC68030 microprocessors are shown in Figure 2-15. Notice the encoding for
SCALE used by the MC68020/MC68030 is a compatible extension of the
M68000 architecture. A value of zero for SCALE is the same encoding for
both extension words; hence, software that uses this encoding is both up-
However, the other values of SCALE are not found in both extension formats;
MC68000 were to execute an instruction that encoded a scaling factor, the
mats implemented by newer processors; while they do detect illegal instruc-
indicating user mode (user privilege level), the user stack pointer (USP) is
cannot be referenced. When S = 1 indicating supervisor mode (at supervisor
privilege level) and M = 1, the master stack pointer (MSP) is the active system
reset and corresponds to the MC68000, MC68008, and MC68010 supervisor
MC68030 USER'S MANUAL
MOTOROLA