MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 92
MC68030FE25C
Manufacturer Part Number
MC68030FE25C
Description
IC MPU 32BIT ENHANCED 132-CQFP
Manufacturer
Freescale Semiconductor
Specifications of MC68030FE25C
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
132-CQFP
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
5V
Operating Supply Voltage (max)
5.25V
Operating Supply Voltage (min)
4.75V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
132
Package Type
CQUAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68030FE25C
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68030FE25C
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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M O T O R O L A
3.2.4 Shift and R o t a t e Instructions
The arithmetic shift instructions (ASR and ASL) and logical shift instructions
Table 3-4 is a summary of the shift and rotate operations,
and without the extend bit. All shift and rotate operations can be performed
on either registers or memory.
may be specified in the instruction operation word (to shift from 1-8 places)
or in a register (modulo 64 shift count).
sition only. The SWAP instruction exchanges the 16-bit halves of a register.
Performance of shift/rotate instructions is enhanced so that use of the ROR
and ROL instructions with a shift count of eight allows fast byte swapping.
(LSR and LSL) provide shift operations in both directions. The ROR, ROL,
ROXR, and ROXL instructions perform rotate (circular shift) operations, with
Register shift and rotate operations shift all operand sizes. The shift count
Memory shift and rotate operations shift word-length operands one bit po-
AND
ANDI
EOR
EORI
OR
ORI
TST
NOT
Instruction
Dn,<data>,<ea>
#<data>,<ea>
Operand Syntax
#(data),(ea)
#(data),(ea)
(ea),Dn
Dn,(ea)
(ea),Dn
Dn,(ea)
(ea)
(ea)
M C 6 8 0 3 0 U S E R ' S M A N U A L
Table 3-3. Loqical Operations
Operand Size
8. I~, 32
8, 15.32
8, 16, 32
8, 16.32
8, 16, 32
8, 16. 32
8, 16, 32
8, 16. 32
8, 16, 32
8, 16.32
source ,*, destination I destination
source ~) destination I) destination
immediate data 0 destination I destination
source V destination I destination
source - - 0 to set condition codes
immediate data .& destination I destination
immediate data V destination I destination
destination i destination
Operation
3-7
3
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