MC68030FE25C Freescale Semiconductor, MC68030FE25C Datasheet - Page 428

• Manufacturer Part Number: MC68030FE25C
• Description: IC MPU 32BIT ENHANCED 132-CQFP
• Manufacturer: Freescale Semiconductor

Specifications of MC68030FE25C

• Processor Type: M680x0 32-Bit
• Speed: 25MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 132-CQFP
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 5V
• Operating Supply Voltage (max): 5.25V
• Operating Supply Voltage (min): 4.75V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: CQUAD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
10.4.7 Transfer from Instruction Stream Primitive
IcAI Pcl 0 I 0 I 0 I'
This primitive uses the CA and PC bits as previously described. If this primitive
When the main processor reads this primitive from the response CIR, it
transfers the F-line operation word of the currently executing coprocessor
This primitive uses the CA and PC bits as previously described. If this primitive
to be transferred from the instruction stream to the coprocessor. The length
is issued with CA=O during a conditional category instruction, the main
The transfer from instruction stream primitive initiates transfers of operands
from the instruction stream to the coprocessor. This primitive applies to
general and conditional category instructions. Figure 10-27 shows the format
of the transfer from instruction stream primitive.
This primitive transfers coprocessor-defined extension words to the copro-
cessor. When the main processor reads this primitive from the response CIR,
stream to the operand CIR. The first word or long word transferred is at the
processor initiates protocol violation exception processing.
instruction to the operation word CIR. The value of the scanPC is not affected
by this primitive.
is issued with C A = 0 during a conditional category instruction, the main
processor initiates protocol violation exception processing.
Bits [0-7] of the primitive format specify the length, in bytes, of the operand
must be an even number of bytes. If an odd length is specified, the main
processor initiates protocol violation exception processing (refer to 10.5.2.1
PROTOCOL VIOLATIONS).
it copies the number of bytes indicated by the length field from the instruction
CA
15
15
PC
Figure 10-27. Transfer from Instruction Stream Primitive Format
14
14
Figure 10-26. Transfer Operation Word Primitive Format
13
13
0
12
12
0
11
11
1
MC68030 USER'S MANUAL
10
10
I
I 1 I'
9
9
1
8
8
1
I 0 I o I 0 I o I o I °
7
7
6
5
LENGTH
4
3
I°1
2
1
10-41
° I
]
0
10