AD9957BSVZ Analog Devices Inc, AD9957BSVZ Datasheet - Page 31

IC DDS 1GSPS 14BIT IQ 100TQFP

AD9957BSVZ

Manufacturer Part Number
AD9957BSVZ
Description
IC DDS 1GSPS 14BIT IQ 100TQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9957BSVZ

Resolution (bits)
14 b
Master Fclk
1GHz
Tuning Word Width (bits)
32 b
Voltage - Supply
1.8V, 3.3V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP Exposed Pad, 100-eTQFP, 100-HTQFP, 100-VQFP
Frequency Range
60MHz To 1GHz
Rf Type
Quadrature
Supply Voltage Range
1.71V To 1.89V, 3.135V To 3.465
Rf Ic Case Style
TQFP
No. Of Pins
100
Operating Temperature Range
-40°C To +85°C
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
100
Mounting
Surface Mount
Case Height
1mm
Screening Level
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AD9957/PCBZ - BOARD EVAL AD9957 QUADRATURE MOD
Lead Free Status / Rohs Status
Compliant

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The circled numbers in Figure 44 indicate specific events,
explained as follows:
Event 1—an I/O update or profile change activates the RAM
bidirectional ramp mode.
Event 2—the RT pin switches to Logic 1. The state machine
initializes to the start address of RAM Segment Register 0 and
begins incrementing the RAM address counter.
Event 3—the RT pin remained at Logic 1 long enough for the
state machine to reach the end address of RAM Segment
Register 0, at which point the address counter is halted.
Event 4—the RT pin switches to Logic 0. The state machine
initializes to the end address of RAM Segment Register 1, resets
the internal timer, and begins decrementing the RAM address
counter.
Rev. B | Page 31 of 64
Event 5—the RT pin switches to Logic 1. The state machine
initializes to the start address of RAM Segment Register 0,
resets the internal timer, and begins incrementing the RAM
address counter.
Event 6—the RT pin switches to Logic 0. The state machine
initializes to the end address of RAM Segment Register 1, resets
the internal timer, and begins decrementing the RAM address
counter.
Event 7—the RT pin remained at Logic 0 long enough for the
state machine to reach the start address of RAM Segment
Register 1, at which point the address counter is halted.
Event 8—the RT pin switches to Logic 1. The state machine
initializes to the start address of RAM Segment Register 0,
resets the internal timer, and begins incrementing the RAM
address counter.
AD9957

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