STA310 STMicroelectronics, STA310 Datasheet - Page 33

• Manufacturer Part Number: STA310
• Description: IC AUDIO DECODER 6+2CH 80-TQFP
• Manufacturer: STMicroelectronics
• Type: Audio Decoderr

Specifications of STA310

• Applications: HDTV, Players, Receivers, Set-Top Boxes
• Voltage - Supply, Analog: 2.5V
• Voltage - Supply, Digital: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Audio Codec Type: MP3 Decoder
• No. Of Dacs: 3
• No. Of Input Channels: 2
• No. Of Output Channels: 6
• Adc / Dac Resolution: 32bit
• Sampling Rate: 192kHz
• Interface Type: I2C, Serial, Parallel
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8856; STA310

9.2 Register map by function
The following tables list the register map by address and function, then each audio decoder register is described
individually
Table 8.
VERSION
SETUP + INPUTS
PCM CONFIGURATION
DAC AND PLL CONFIGURATION
Code
(a)
(b)
(1)
(2)
(3)
(f)
(r)
Register modification is ALWAYS taken into account by the audio decoder.
Any change to these registers is taken into account immediately.
Register modification is taken into account AFTER EVERY DECODED DATA BLOCK or JUST AFTER
RESET (soft or hard).
The decoded block is related to the granularity of the computation in the audio decoder software.
A block is 256 samples in Dolby Digital, 96 samples in MPEG, 80 samples in LPCM/PCM.
Register modification is taken into account AFTER EVERY DATA FRAME.
A frame is: 1152 samples in MPEG I/II, 1536 samples in Dolby Digital, 384 samples in MPEG-1 layer 1, 80
samples in LPCM/PCM.
Register modification is taken into account ONLY WHEN THE DSP IS RUN AFTER RESET (soft or hard).
The delay registers are updated when bit 0 of the
The volume is updated when CHAN_IDX is set to the appropriate value.
The Karaoke mode is updated when
Register function
0xBA
0xBB
0xBC
0xBD
0xBE
0x0C
0x0D
0x0E
0x1D
0xB5
0xB6
0xB7
0xB8
0xB9
0x00
0x01
0x71
0x54
0x55
0x56
0x05
0x12
0x18
0x12
0x11
0x12
HEX
KAR_UPDATE is set to ’1’.
Description
DEC
181
182
183
184
185
186
187
188
189
190
113
12
13
84
85
86
18
24
14
18
17
29
18
0
1
5
UPDATE register is set to 1.
VERSION
IDENT
SOFT‘VER
SIN_SETUP
CAN_SETUP
PCMDIVIDER
PCMCONF
PCMCROSS
SFREQ
PLLCTRL
PLLMASK
DATA IN
PLLCTRL
PLL_DATA
PLL_CMD(f)
PLL_ADD
ENA_ALL FRACPLL
AU_PLL_FRACL_192
AU_PLL_FRACH_192
AU_PLL_XDIV_192
AU_PLL_MDIV_192
AU_PLL_NDIV_192
AU_PLL_FRACL_176
AU_PLL_FRACH_176
AU_PLL_XDIV_176
AU_PLL_MDIV_176
(f)
(f)
(f)
(f)
(a)
(a)
(b)
(a)
(b)
(a)
(b)
Name
STA310
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