STA310 STMicroelectronics, STA310 Datasheet - Page 7

• Manufacturer Part Number: STA310
• Description: IC AUDIO DECODER 6+2CH 80-TQFP
• Manufacturer: STMicroelectronics
• Type: Audio Decoderr

Specifications of STA310

• Applications: HDTV, Players, Receivers, Set-Top Boxes
• Voltage - Supply, Analog: 2.5V
• Voltage - Supply, Digital: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Audio Codec Type: MP3 Decoder
• No. Of Dacs: 3
• No. Of Input Channels: 2
• No. Of Output Channels: 6
• Adc / Dac Resolution: 32bit
• Sampling Rate: 192kHz
• Interface Type: I2C, Serial, Parallel
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8856; STA310

2.1.3 Control I/F
I2C slave or parallel interface:
The device configuration and the command issuing is done via this interface. To facilitate the contact with the
MCU, 2 interrupt lines (IRQB and INTLINE) are available.
3
3.1 Data flow
The STA310 is based on a programmable MMDSP+ core optimized for audio decoding algorithms.
Dedicated hardware has been added to perform specific operations such as bitstream depacking or IEC data
formatting.
The arrows in Figure 3 indicate the data flow within the chip.
The compressed bitstream is input via the data input interface.
Data are transferred on a byte basis to the FIFO. This FIFO allows burst input data at up to 33Mbit/s.
The input processor, which is composed of a packet parser and an audio parser, unpacks the bitstream (Packet
parser) and verifies the syntax of the incoming stream (audio parser).
The compressed audio frames with their associated information (PTS) are stored into the circular frame buffer.
While a second frame is stored in the circular frame buffer, the first frame is extracted by the audio core decoder
which decodes it to produce audio samples.
The PCM unit converts the samples to the PCM format. The PCM unit controls also the channel delay buffer in
order to delay each channel independently.
In parallel, the IEC unit transmits non compressed data or compressed data according to the selected mode. In
the compressed mode, the data are extracted directly from the circular buffer and formatted according to the
IEC-61937 standard. In non compressed mode, the left and right PCM channels formatted by the PCM unit are
output by the IEC unit, according to the SPDIF standard
Figure 1. Architecture and data flows
- S/P DIF Output
ARCHITECTURE OVERVIEW
DATAIN
1
• Data From a Prologic downmix (encoder)
“Lrclk” “Sclk” “PcmClk”
INPUT DATA
INTERFACE
INTERFACE
CONTROL,
CLOCKS
STATUS
HOST
2
256 x 8
CIRCULAR FRAME BUFFER
FIFO
CORE AUDIO
DECODER
3
4
PROCESSOR
INPUT
5
7
CHANNEL DELAY
BUFFER (35ms)
FORMATER
PCM UNIT
IEC958
6
8
IEC958
(1937)
OUT
PCMOUT
STA310
7/90