PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 110
PEB20534H-10V2.1
Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
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Figure 31
Bus Arbitration Master Initialization:
After reset, the master is normally starting execution out of external memory. During
reset, the default is the arbitration slave mode. The master arbitration mode must first be
selected by setting bit LCONF.ABM=’1’. During the initialization, the ’HLDEN’ bit in
register LCONF must be set. Since the LHOLD pin is hold high through the external pull-
up, no hold requests can occur even when the slave is not initialized yet.
Note that the HLDEN bit of the master can be reset during normal operation to force the
master to ignore hold requests from the slave until HLDEN is set again. However, the
pins LHOLD, LHLDA and LBREQ are still reserved for the bus arbitration. This is
intended to have the option to disable certain critical processes against interruption
through hold requests:
Data Sheet
MASTER
Connection of the Master and Slave Bus Arbitration Signals
HOLD
HLDA
BREQ
V
CC
110
V
CC
HOLD
HLDA
BREQ
Multi Function Port (MFP)
SLAVE
ITS10617
PEB 20534
PEF 20534
2000-05-30
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