PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 333
PEB20534H-10V2.1
Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
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Data Sheet
MXON
MXOFF
XON Character Mask
Setting a bit in this bit field to ’1’ masks the corresponding bit in bit field
’XON’ of register XNXF. A masked bit position always matches when
comparing the received character with bit field ’XON’.
bit = ’0’
bit = ’1’
XOFF Character Mask
Setting a bit in this bit field to ’1’ masks the corresponding bit in bit field
’XOFF’ of register XNXF. A masked bit position always matches when
comparing the received character with bit field ’XOFF’.
bit = ’0’
bit = ’1’
The dedicated bit position is NOT masked. This bit
position in the received character must match with the
corresponding bit position in bit field ’XON’ to recognize
the received character as a ’XON’ character.
The dedicated bit position is masked. This bit position in
the received address NEED NOT match with the
corresponding bit position in bit field ’XON’ to recognize
the received character as a ’XON’ character.
The dedicated bit position is NOT masked. This bit
position in the received character must match with the
corresponding bit position in bit field ’XOFF’ to recognize
the received character as a ’XOFF’ character.
The dedicated bit position is masked. This bit position in
the received address NEED NOT match with the
corresponding bit position in bit field ’XOFF’ to recognize
the received character as a ’XOFF’ character.
333
Detailed Register Description
(async mode)
(async mode)
PEB 20534
PEF 20534
2000-05-30
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