PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 201

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

9
9.1
The DSCC4 offers several reset functions. An external low signal on signal RST resets
the DSCC4. It immediately drives all PCI outputs to their benign state, pin REQ is driven
to tristate. The TxDn output signals are driven to high impedance, the RTSn output
signals are driven to inactive. All bi-directional signals (e.g. Multi Function Port (MFP))
are switched to input function.
All registers and functions are initialized to known states (RESET values).
After RST is deasserted, the functional blocks PCI, SCCs, LBI, SSC and GPP are in
reset state or standby mode.
Table 26
Block
PCI interface
Global Registers
DMAC
SCC
LBI
SSC
GPP
Data Sheet
Reset and Initialization Procedure
Reset and Power-On
Status after Hardware Reset
Reset Status
Standby
PCI Config Space registers accessible.
Standby
Slave registers accessible;
Host Bus Interface enabled in PCI mode!
Standby
Slave registers accessible.
Standby
Slave registers accessible
Reset Status:
– power-down mode
– HDLC mode
– NRZ coding
– …
Refer to reset values in
Register Description” on Page
Reset
Slave register LCONF has reset value.
Standby
Slave registers accessible.
Standby
Slave registers accessible.
201
Reset and Initialization Procedure
“SCC Registers - Detailed
272.
PEB 20534
PEF 20534
2000-05-30