PEF 24470 H V1.3 Infineon Technologies, PEF 24470 H V1.3 Datasheet - Page 37

• Manufacturer Part Number: PEF 24470 H V1.3
• Description: IC MTSI-XL SWITCHING MQFP100
• Manufacturer: Infineon Technologies
• Series: SWITIr

Specifications of PEF 24470 H V1.3

• Function: Switching IC
• Interface: PCM, PLL
• Number Of Circuits: 1
• Voltage - Supply: 3.13 V ~ 3.47 V
• Current - Supply: 200mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-SQFP
• Includes: Clock Shift, Data Rate Adaption, Multipoint Switching
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: PEF24470HV1.3X; SP000007617

PRELIMINARY
3.7
3.7.1
There are two independent low active reset pins: RESET and TRST.
If the RESET pin is activated, it immediately sets all outputs and I/O ports into tri-state,
except the ECLKO pin. After the reset process the correct external frequency must be
set with the command ’Set external frequency’ accordingly. This command starts the
configuration process for the APLL. The APLL is locked after 750 µs. During this period
the APLL is bypassed and the internal frequency is 2.048 MHz. If the APLL is locked the
internal frequency will be 49.152 MHz.
Individual output sections must be enabled by setting the command in the configuration
command register CMD1, or CMD2. Internally all state machines, counters and registers
are cleared and set to their defined reset value.
The RESET pin doesn’t control the boundary scan register and TAP-controller. If the
TRST pin is asserted the TAP-controller will go into the Test-Logic-Reset state and all
boundary scan elements are bypassed. All outputs and I/O-pins are controlled by the
core logic and are tristated according to the programmed functionality or the core reset
condition (pin RESET).
The hardware reset must be issued for a minimum of 1 µs, for more details please refer
to the chapter
3.7.2
The software reset is accomplished by setting the ’Set Software Reset’ command in the
CMD2
and the temporary microprocessor registers (e.g. CMD1).
The software reset can be deactivated with the ’Set Software Reset’ command. During
the software reset the microprocessor interface doesn’t accept any other commands for
a minimum of 1 µs.
Preliminary Data Sheet
register. The software reset clears the complete device except the clocking unit
Power-On and Reset Behavior
Hardware Reset
Software Reset
“Hardware Reset Timing” on page 112.
28
PEF 20450 / 20470 / 24470
Architectural Description
2001-11-20