AT89LP52 Atmel Corporation, AT89LP52 Datasheet - Page 39

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AT89LP52

Manufacturer Part Number
AT89LP52
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT89LP52

Flash (kbytes)
8 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
36
Uart
1
Sram (kbytes)
0.25
Eeprom (bytes)
256
Self Program Memory
IAP
Operating Voltage (vcc)
2.4 to 5.5
Timers
3
Isp
SPI
Watchdog
Yes

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Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 9-4.
3709D–MICRO–12/11
Clock Cycles
Clock Cycles
Clock Cycles
Clock Cycles
Instruction
Instruction
Instruction
Instruction
INT0
INT0
INT0
INT0
Minimum Interrupt Response Time (Fast Mode)
Maximum Interrupt Response Time (Fast Mode)
Minimum Interrupt Response Time (Compatibility Mode)
Maximum Interrupt Response Time (Compatibility Mode)
IE0
IE0
IE0
IE0
Cur. Instr.
1
instruction is 5 cycles long. If the instruction in progress is RETI, the additional wait time cannot
be more than 9 cycles (a maximum of 4 more cycles to complete the instruction in progress, plus
a maximum of 5 cycles to complete the next instruction). Thus, in a single-interrupt system, the
response time is always more than 5 clock cycles and less than 14 clock cycles. See
and
1
Ack.
1
1
Ack.
Figure
RETI
LCALL
RETI
LCALL
9-2.
13
MOVX @/DPTR, A
5
14
ISR
5
1st ISR Instr.
Ack.
MUL AB
10
LCALL
Ack.
37
14
1st ISR Instr.
LCALL
49
ISR
AT89LP51/52
Figure 9-1
39

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