AT89LP52 Atmel Corporation, AT89LP52 Datasheet - Page 45

• Manufacturer Part Number: AT89LP52
• Manufacturer: Atmel Corporation

Specifications of AT89LP52

• Flash (kbytes): 8 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 36
• Uart: 1
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 3
• Isp: SPI
• Watchdog: Yes

10.3
3709D–MICRO–12/11
Port Alternate Functions
Most general-purpose digital I/O pins of the AT89LP51/52 share functionality with the various
I/Os needed for the peripheral units.
Alternate functions are connected to the pins in a logic AND fashion. In order to enable the
alternate function on a port pin, that pin must have a “1” in its corresponding port register bit,
otherwise the input/output will always be “0”. However, alternate functions may be temporarily
forced to “0” by clearing the associated port bit, provided that the pin is not in input-only mode.
Furthermore, each pin must be configured for the correct input/output mode as required by its
peripheral before it may be used as such.
use with an alternate function. If two or more port pins on the same 8-bit require difference direc-
tions, the port must be configured for bidirectional operation.
Table 10-5.
Table 10-6.
P0.0–P0.7
P2.0–P2.7
Port Pin
P1.0
P1.1
P1.5
P1.6
P1.7
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
PxM0
0
0
1
1
Pin Function Configurations for Port x Pin y
Port Pin Alternate Functions
PxM0
P1M0
P1M0
P1M0
P1M0
P1M0
P3M0
P3M0
P3M0
P3M0
P3M0
P3M0
P3M0
P3M0
Configuration Bits
PxM1
N/A
N/A
0
1
0
1
PxM1
P1M1
P1M1
P1M1
P1M1
P1M1
P3M1
P3M1
P3M1
P3M1
P3M1
P3M1
P3M1
P3M1
Table 10-6
Table 10-5
AD0–AD7
Px.y
Alternate
Function
A8–A15
X
lists the alternate functions of the port pins.
1
1
1
T2EX
MOSI
MISO
SCK
RXD
INT0
INT1
TXD
WR
RD
T2
T0
T1
shows how to configure a generic pin for
Notes
Address and data on Port 0 are
automatically configured as output
or input regardless of P0M0 and
P0M1.
T2 Clock out toggles P1.0 directly
Address on Port 2 is automatically
configured as output regardless of
P2M0 and P2M1.
T0 Clock out toggles P3.4 directly
T1 Clock out toggles P3.5 directly
I/O Mode
bidirectional (internal pull-up)
output
input
bidirectional (external pull-up)
AT89LP51/52
45