AT89LP52 Atmel Corporation, AT89LP52 Datasheet - Page 43

• Manufacturer Part Number: AT89LP52
• Manufacturer: Atmel Corporation

Specifications of AT89LP52

• Flash (kbytes): 8 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 36
• Uart: 1
• Sram (kbytes): 0.25
• Eeprom (bytes): 256
• Self Program Memory: IAP
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 3
• Isp: SPI
• Watchdog: Yes

10.1.3
3709D–MICRO–12/11
Open-drain Output
Figure 10-1. Quasi-bidirectional Output
Figure 10-2. Input Only
Figure 10-3. Input Circuit for P3.2, P3.3, P4.6 and P4.7
The open-drain output configuration turns off all pull-ups and only drives the pull-down transistor
of the port pin when the port latch contains a logic “0”. To be used as a logic output, a port con-
figured in this manner must have an external pull-up, typically a resistor tied to V
down for this mode is the same as for the quasi-bidirectional mode. The open-drain port configu-
ration is shown in
during Power-down (see
Power-down when configured in this mode.
Figure 10-4. Open-Drain Output
F rom P o r t
Register
Register
F rom P o r t
Figure
Figure
10-4. The input circuitry of P3.2, P3.3, P4.6 and P4.7 is not disabled
Input
Data
Input
Data
1 Clo c k Del a y
(D Flip-Flop)
10-3) and therefore these pins should not be left floating during
PWD
Input
Input
Data
Data
PWD
PWD
V
Strong
CC
P o r t
Port
Pin
Pin
V
W ea k
V e r y
CC
AT89LP51/52
V
W ea k
CC
P o r t
Pin
P o r t
Pin
DD
. The pull-
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