ATmega64A Atmel Corporation, ATmega64A Datasheet - Page 266

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ATmega64A

Manufacturer Part Number
ATmega64A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega64A

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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25.5.4
8160C–AVR–07/09
Scanning the Clock Pins
The AVR devices have many clock options selectable by fuses. These are: Internal RC Oscilla-
tor, External RC, External Clock, (High Frequency) Crystal Oscillator, Low-frequency Crystal
Oscillator, and Ceramic Resonator.
Figure 25-7
The Enable signal is supported with a general boundary-scan cell, while the Oscillator/clock out-
put is attached to an observe-only cell. In addition to the main clock, the timer Oscillator is
scanned in the same way. The output from the internal RC Oscillator is not scanned, as this
Oscillator does not have external connections.
Figure 25-7. Boundary-scan Cells for Oscillators and Clock Options
Table 25-3
XTAL1/XTAL2 connections as well as 32 kHz Timer Oscillator.
Table 25-3.
Note:
Enable Signal
EXTCLKEN
OSCON
RCOSCEN
OSC32EN
TOSKON
Previous
1. Do not enable more than one clock source as main clock at a time.
2. Scanning an Oscillator output gives unpredictable results as there is a frequency drift between
3. The clock configuration is programmed by fuses. As a fuse does not change run-time, the
From
Cell
the internal Oscillator and the JTAG TCK clock. If possible, scanning an external clock is
preferred.
clock configuration is considered fixed for a given application. The user is advised to scan the
ShiftDR
shows how each Oscillator with external connection is supported in the scan chain.
summaries the scan registers for the external clock pin XTAL1, oscillators with
0
1
Scan Signals for the Oscillators
ClockDR
Scanned Clock Line
EXTCLK (XTAL1)
OSCCK
RCCK
OSC32CK
TOSCK
D
UpdateDR
Q
Next
Cell
To
D
G
Q
EXTEST
0
1
Clock Option
External Clock
External Crystal
External Ceramic Resonator
External RC
Low Freq. External Crystal
32 kHz Timer Oscillator
XTAL1/TOSC1
ENABLE
(1)(2)(3)
Oscillator
XTAL2/TOSC2
OUTPUT
Previous
From
Cell
ShiftDR
0
1
ATmega64A
ClockDR
Scanned Clock Line
when Not Used
D
FF1
Q
0
0
0
1
0
Next
Cell
To
266

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