ATmega64A Atmel Corporation, ATmega64A Datasheet - Page 27

• Manufacturer Part Number: ATmega64A
• Manufacturer: Atmel Corporation

Specifications of ATmega64A

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.5.7
8160C–AVR–07/09
Using all Locations of External Memory Smaller than 64 KB
Figure 7-8.
Note:
Figure 7-9.
Note:
Since the external memory is mapped after the internal memory as shown in
23, the external memory is not addressed when addressing the first 4,352 bytes of data space. It
may appear that the first 4,352 bytes of the external memory are inaccessible (external memory
addresses 0x0000 to 0x10FF). However, when connecting an external memory smaller than 64
KB, for example 32 KB, these locations are easily accessed simply by addressing from address
0x8000 to 0x90FF. Since the External Memory Address bit A15 is not connected to the external
memory, addresses 0x8000 to 0x90FF will appear as addresses 0x0000 to 0x10FF for the exter-
nal memory. Addressing above address 0x90FF is not recommended, since this will address an
external memory location that is already accessed by another (lower) address. To the Applica-
tion software, the external 32 KB memory will appear as one linear 32 KB address space from
System Clock (CLK
System Clock (CLK
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper sector) or
1. SRWn1 = SRW11 (upper sector) or SRW01 (lower sector), SRWn0 = SRW10 (upper sector) or
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
DA7:0 (XMBK = 0)
DA7:0 (XMBK = 1)
SRW00 (lower sector).
The ALE pulse in period T6 is only present if the next instruction accesses the RAM (internal
or external).
SRW00 (lower sector).
The ALE pulse in period T7 is only present if the next instruction accesses the RAM (internal
or external).
External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 0
External Data Memory Cycles with SRWn1 = 1 and SRWn0 = 1
DA7:0
A15:8
DA7:0
A15:8
CPU
ALE
WR
CPU
RD
ALE
WR
RD
)
)
Prev. Addr.
Prev. Data
Prev. Data
Prev. Data
Prev. Addr.
Prev. Data
Prev. Data
Prev. Data
T1
T1
Address
Address
Address
Address
Address
T2
Address
T2
XX
XX
Data
Address
T3
Data
Data
Address
T3
Data
Data
Data
T4
T4
T5
T5
T6
ATmega64A
Figure 7-4 on page
(1)
(1)
T6
T7
27