SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1065
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SAM9G45
Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G45.pdf
(10 pages)
5.SAM9G45.pdf
(55 pages)
6.SAM9G45.pdf
(1196 pages)
Specifications of SAM9G45
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G45 PDF datasheet #4
- SAM9G45 PDF datasheet #5
- SAM9G45 PDF datasheet #6
- Current page: 1065 of 1196
- Download datasheet (20Mb)
44. True Random Number Generator (TRNG)
44.1
6438G–ATARM–19-Apr-11
Description
The True Random Number Generator (TRNG) passes the American NIST Special Publication
800-22 and Diehard Random Tests Suites.
As soon as the TRNG is enabled (TRNG_CTRL register), the generator provides one 32-bit
value every 84 clock cycles. Interrupt trng_int can be enabled through the TRNG_IER register
(respectively disabled in TRNG_IDR). This interrupt is set when a new random value is available
and is cleared when the status register is read (TRNG_SR register). The flag DATRDY of the
status register (TRNG_ISR) is set when the random data is ready to be read out on the 32-bit
output data register (TRNG_ODATA).
The normal mode of operation checks that the status register flag equals 1 before reading the
output data register when a 32-bit random value is required by the software application.
Figure 44-1. TRNG Data Generation Sequence
trng_cr
enable
trng_int
clock
84 clock cycles
Read TRNG_ODATA
Read TRNG_ISR
84 clock cycles
84 clock cycles
Read TRNG_ODATA
Read TRNG_ISR
SAM9G45
1065
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