SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 1167

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 46-25. SPI Slave Mode - NPCS Timings
Table 46-46. UART SPI Timings with 3.3V Peripheral Supply
Notes:
6438G–ATARM–19-Apr-11
Symbol
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
1. For output signals, Min and Max access time must be extracted. The Min access time is the time between the SPCK rising or
falling edge and the signal change. The Max access time is the time between the SPCK rising or falling edge and the signal
stabilization.
Parameter
SPCK Period
Input Data Setup Time
Input Data Hold Time
Chip Select Active to Serial Clock
Output Data Setup Time
Serial Clock to Chip Select Inactive
SPCK falling to MISO
MOSI Setup time before SPCK rises
MOSI Hold time after SPCK rises
SPCK rising to MISO
MOSI Setup time before SPCK falls
MOSI Hold time after SPCK falls
NPCS0 setup to SPCK rising
NPCS0 hold after SPCK falling
NPCS0 setup to SPCK falling
NPCS0 hold after SPCK rising
NPCS0 falling to MISO valid
Figure 46-9
(CPOL = 0)
(CPOL = 1)
MISO
SPCK
SPCK
illustrates Min and Max accesses for SPI2. The same applies to SPI5, SPI6, SPI9.
SPI
SPI
SPI
16
12
14
SPI
6
SPI
9
Master Mode
Slave Mode
Cond
13.8
4.7
17.2
10.3
10.7
Min
7.5
0.4
2.0
2.0
2.9
0
0
(1)
(1)
SPI
SPI
15
13
16.9
17.1
Max
16.0
-0.3
3.5
0.2
(1)
(1)
SAM9G45
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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