SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 849

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

:Endpoint Type
• BK_NUMBER: Number of Banks
Read and write:
Set this field according to the endpoint’s number of banks (see
Number of Banks
• NB_TRANS: Number Of Transaction per Microframe
Read and Write:
The Number of transactions per microframe is set by software.
Note:
• EPT_MAPD: Endpoint Mapped
Read-only:
0 = the user should reprogram the register with correct values.
1 = set by hardware when the endpoint size (EPT_SIZE) and the number of banks (BK_NUMBER) are correct regarding:
6438G–ATARM–19-Apr-11
00
01
10
11
00
01
10
11
– the fifo max capacity (FIFO_MAX_SIZE in UDPHS_IPFEATURES register)
– the number of endpoints/banks already allocated
– the number of allowed banks for this endpoint
Meaningful for high bandwidth isochronous endpoint only.
Zero bank, the endpoint is not mapped in memory
One bank (bank 0)
Double bank (Ping-Pong: bank 0/bank 1)
Triple bank (bank 0/bank 1/bank 2)
Control endpoint
Isochronous endpoint
Bulk endpoint
Interrupt endpoint
Section 38.5.5 ”Endpoint
Configuration”).
SAM9G45
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