SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 975

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Figure 41-13. Multi-buffer Transfer with Source Address Auto-reloaded and Contiguous Destination Address
6438G–ATARM–19-Apr-11
Address of
Source Layer
The transfer is similar to that shown in
The DMAC Transfer flow is shown in
b. If the buffer complete interrupt is masked (DMAC_EBCIMR.BTC[x] = ‘1’, where x is
SADDR
automatic transfer mode bit should remain enabled to keep the DMAC in Row 11 as
shown in
the channel number) then hardware does not stall until it detects a write to the buf-
fer transfer completed interrupt enable register but starts the next buffer transfer
immediately. In this case software must clear the automatic mode bit,
DMAC_CTRLBx.AUTO, to put the device into ROW 1 of
before the last buffer of the DMAC transfer has completed.
Source Buffers
Table 41-2 on page
Figure 41-14 on page
Buffer0
Buffer2
Buffer1
Figure 41-13 on page
960.
Destination Buffers
DADDR(0)
DADDR(1)
DADDR(2)
Destination Layer
976.
Address of
975.
Table 41-2 on page 960
SAM9G45
975