SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 21
SAM9G45
Manufacturer Part Number
SAM9G45
Description
Manufacturer
Atmel Corporation
Datasheets
1.SAM9261.pdf
(248 pages)
2.SAM9261.pdf
(1274 pages)
3.SAM9261.pdf
(43 pages)
4.SAM9G45.pdf
(10 pages)
5.SAM9G45.pdf
(55 pages)
6.SAM9G45.pdf
(1196 pages)
Specifications of SAM9G45
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- SAM9261 PDF datasheet
- SAM9261 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9G45 PDF datasheet #4
- SAM9G45 PDF datasheet #5
- SAM9G45 PDF datasheet #6
- Current page: 21 of 1196
- Download datasheet (20Mb)
7.2
Figure 7-1.
6438G–ATARM–19-Apr-11
System Controller Block Diagram
SAM9G45 System Controller Block Diagram
PC0-PC31
PD0-PD31
PB0-PB31
PE0-PE31
VDDBU
PA0-PA31
XOUT32
WKUP
SHDN
XIN32
XOUT
NRST
XIN
VDDCORE
MAIN OSC
VDDBU
dbgu_irq
CLOCK
12MHz
SLOW
periph_irq[2..24]
pmc_irq
rstc_irq
POR
POR
OSC
OSC
wdt_irq
RC
PLLA
UPLL
periph_clk[2..6]
backup_nreset
backup_nreset
pit_irq
rtt_irq
periph_nreset
periph_nreset
periph_nreset
periph_nreset
proc_nreset
dbgu_rxd
dbgu_rxd
irq0-irq2
debug
debug
SLCK
SLCK
SLCK
SLCK
SLCK
MCK
MCK
backup_nreset
idle
SCKCR
fiq
int
rtt0_alarm
por_ntrst
jtag_nreset
MAINCK
PLLACK
UPLLCK
SLCK
System Controller
Management
Shut-Down
Real-Time
Real-Time
Controllers
Advanced
Watchdog
Controller
Controller
Controller
Controller
Interrupt
Periodic
Interval
Debug
Power
Reset
Timer
Timer
Clock
Timer
PIO
Unit
wdt_fault
WDRPROC
4 General-purpose
Backup Registers
int
dbgu_irq
dbgu_txd
pit_irq
wdt_irq
rstc_irq
periph_nreset
proc_nreset
backup_nreset
rtc_irq
rtc_alarm
rtt_irq
rtt_alarm
periph_clk[2..30]
pck[0-1]
PCK
MCK
DDR sysclk
pmc_irq
idle
periph_irq[2..6]
irq
fiq
dbgu_txd
UHP12M
UHP48M
VDDBU Powered
VDDCORE Powered
por_ntrst
periph_clk[6..30]
periph_irq[6..30]
periph_nreset
periph_irq[25]
periph_nreset
periph_nreset
periph_irq[24]
periph_nreset
proc_nreset
in
out
enable
jtag_nreset
UHP48M
UPLLCK
UHP12M
UPLLCK
debug
PCK
MCK
nirq
nfiq
ntrst
USB High Speed
USB High Speed
Boundary Scan
TAP Controller
ARM926EJ-S
Device Port
Peripherals
Embedded
Bus Matrix
Host Port
SAM9G45
21
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