SAM9G45 Atmel Corporation, SAM9G45 Datasheet - Page 915

• Manufacturer Part Number: SAM9G45
• Manufacturer: Atmel Corporation

Specifications of SAM9G45

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

40.4
Table 40-1.
40.5
40.5.1
40.5.2
40.5.3
40.5.4
6438G–ATARM–19-Apr-11
Pin Name
VDDANA
TSADVREF
AD0X
AD1X
AD2Y
AD3Y
GPAD4 - GPAD7
TSADTRG
P
M
P
M
Signal Description
Product Dependencies
Power Management
Interrupt Sources
Analog Inputs
I/O Lines
TSADCC Pin Description
The TSADC controller is not continuously clocked. The programmer must first enable the
TSADC controller Clock in the Power Management Controller (PMC) before using the TSADC
controller. However, if the application does not require TSADC controller operations, the TSADC
controller clock can be stopped when not needed and be restarted later.
Configuring the TSADC controller does not require the TSADC controller clock to be enabled.
The TSADCC interrupt line is connected on one of the internal sources of the Advanced Inter-
rupt Controller. Using the TSADCC interrupt requires the AIC to be programmed first.
Table 40-2.
The analog input pins can be multiplexed with PIO lines. In this case, the assignment of the
TSADCC input is automatically done as soon as the corresponding channel is enabled by writing
the register TSADCC_CHER. By default, after reset, the PIO lines are configured as input with
its pull-up enabled and the TSADCC inputs are connected to the GND.
The pin TSADTRG may be shared with other peripheral functions through the PIO Controller. In
this case, the PIO Controller should be set accordingly to assign the pin TSADTRG to the
TSADCC function.
Table 40-3.
TSADCC
Instance
Instance
TSADCC
Peripheral IDs
I/O Lines
Description
Analog power supply
Reference voltage
Analog input channel 0 or Touch Screen Top channel
Analog input channel 1 or Touch Screen Bottom channel
Analog input channel 2 or Touch Screen Right channel
Analog input channel 3 or Touch Screen Left channel
General-purpose analog input channels 4 to 7
External trigger
20
ID
TSADTRG
Signal
I/O Line
PD28
SAM9G45
Peripheral
A
915