AD7193 Analog Devices, AD7193 Datasheet - Page 12

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AD7193

Manufacturer Part Number
AD7193
Description
4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
Manufacturer
Analog Devices
Datasheet

Specifications of AD7193

Resolution (bits)
24bit
# Chan
4
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Uni,Usr-Defined Range/Offset
Ain Range
± (Vref/Gain)
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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AD7193
Pin No.
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Mnemonic
AIN4
AIN5
AIN6
AIN7
AIN8
REFIN1(+)
REFIN1(−)
BPDSW
AGND
DGND
AV
DV
SYNC
DOUT/RDY
DIN
DD
DD
Description
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN3 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN6 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN5 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the positive input of a fully differential input pair when used with
AIN8 or as a pseudo differential input when used with AINCOM.
Analog Input. This pin can be configured as the negative input of a fully differential input pair when used
with AIN7 or as a pseudo differential input when used with AINCOM.
Positive Reference Input. An external reference can be applied between REFIN1(+) and REFIN1(−). REFIN1(+)
can lie anywhere between AV
AV
Negative Reference Input. This reference input can lie anywhere between AGND and AV
Bridge Power-Down Switch to AGND.
Analog Ground Reference Point.
Digital Ground Reference Point.
Analog Supply Voltage, 3 V to 5.25 V. AV
AV
Digital Supply Voltage, 2.7 V to 5.25 V. DV
with DV
Logic input that allows for synchronization of the digital filters and analog modulators when using a number
of AD7193 devices. While SYNC is low, the nodes of the digital filter, the filter control logic, and the calibration
control logic are reset, and the analog modulator is also held in its reset state. SYNC does not affect the digital
interface but does reset RDY to a high state if it is low. SYNC has a pull-up resistor internally to DV
Serial Data Output/Data Ready Output. DOUT/RDY serves a dual purpose. It functions as a serial data output
pin to access the output shift register of the ADC. The output shift register can contain data from any of the
on-chip data or control registers. In addition, DOUT/RDY operates as a data ready pin, going low to indicate
the completion of a conversion. If the data is not read after the conversion, the pin goes high before the next
update occurs. The DOUT/RDY falling edge can be used as an interrupt to a processor, indicating that valid
data is available. With an external serial clock, the data can be read using the DOUT/RDY pin. With CS low, the
data-/control-word information is placed on the DOUT/RDY pin on the SCLK falling edge and is valid on the
SCLK rising edge.
Serial Data Input to the Input Shift Register on the ADC. Data in this shift register is transferred to the control
registers in the ADC, with the register selection bits of the communications register identifying the
appropriate register.
DD
DD
, but the part functions with a reference from 1 V to AV
at 5 V or vice versa.
DD
at 5 V or vice versa.
DD
Rev. C | Page 12 of 56
and AGND + 1 V. The nominal reference voltage, (REFIN1(+) − REFIN1(−)), is
DD
DD
is independent of DV
is independent of AV
DD
.
DD
DD
. Therefore, DV
. Therefore, AV
DD
DD
can be operated at 3 V with
can be operated at 3 V
DD
− 1 V.
Data Sheet
DD
.

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