AD7193 Analog Devices, AD7193 Datasheet - Page 21

• Manufacturer Part Number: AD7193
• Description: 4-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
• Manufacturer: Analog Devices

Specifications of AD7193

• Resolution (bits): 24bit
• # Chan: 4
• Sample Rate: n/a
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni,SE-Uni,Usr-Defined Range/Offset
• Ain Range: ± (Vref/Gain)
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

Data Sheet
ON-CHIP REGISTERS
The ADC is controlled and configured via a number of on-chip registers that are described on the following pages wherein the term set
implies a Logic 1 state and the term cleared implies a Logic 0 state, unless otherwise noted.
Table 16. Register Summary
Register
Communications
Status
Mode
Configuration
Data
ID
GPOCON
Offset
Full Scale
Addr.
00
00
01
02
03
04
05
06
07
Dir.
W
R
R/W
R/W
R
R
R/W
R/W
R/W
Default
00
80
080060
000117
000000
X2
00
800000
5XXXX0
Bit 7
WEN
RDY
SINC3
FS7
Chop (MSB)
CH7
Burn
D23 (MSB)
D15
D7
X
0
OF23 (MSB)
OF15
OF7
FS23 (MSB)
FS15
FS7
Mode select
Rev. C | Page 21 of 56
Bit 6
R/W
ERR
0
FS6
0
CH6
REFDET
D22
D14
D6
X
BPDSW
OF22
OF14
OF6
FS22
FS14
FS6
Bit 5
NOREF
ENPAR
FS5
0
CH5
0
D21
D13
D5
X
GP32EN
OF21
OF13
OF5
FS21
FS13
FS5
Register address
FS4
D12
D4
X
OF4
FS4
Bit 4
Parity
DAT_STA
CLK_DIV
REFSEL
CH4
BUF
D20
GP10EN
OF20
OF12
FS20
FS12
Bit 3
CHD3
CLK1
Single
FS3
0
CH3
U/B
D19
D11
D3
0
P3DAT
OF19
OF11
OF3
FS19
FS11
FS3
Bit 2
CREAD
CHD2
CLK0
REJ60
FS2
Pseudo
CH2
G2
D18
D10
D2
0
P2DAT
OF18
OF10
OF2
FS18
FS10
FS2
Bit 1
0
CHD1
AVG1
FS9
FS1
Short
CH1
G1
D9
D1
1
P1DAT
OF17
OF9
OF1
FS17
FS9
FS1
D17
AD7193
Bit 0
0
CHD0
AVG0
FS8
FS0 (LSB)
TEMP
CH0
G0 (LSB)
D16
D8
D0 (LSB)
0
P0DAT
OF16
OF8
OF0 (LSB)
FS16
FS8
FS0 (LSB)