LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 14

• Manufacturer Part Number: LPC1850FET256
• Description: The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P1_18
P1_19
P1_20
Pin description
N12
M11
M10
x
x
x
…continued
J10
K9
K10 100 70
96
95
All information provided in this document is subject to legal disclaimers.
67
68
Rev. 3.1 — 15 December 2011
46
47
48
[3]
[3]
[3]
I; PU I/O GPIO0[13] — General purpose digital input/output
I; PU I
I; PU I/O GPIO0[15] — General purpose digital input/output
I/O U2_DIR — RS-485/EIA-485 output enable/direction
-
O
O
I
-
-
I/O SSP1_SCK — Serial clock for SSP1.
-
-
O
-
O
I/O I2S1_TX_SCK — Transmit Clock. It is driven by the
I/O SSP1_SSEL — Slave Select for SSP1.
-
O
I
-
-
-
Description
pin.
control for USART2.
R — Function reserved.
ENET_TXD0 — Ethernet transmit data 0 (RMII/MII
interface).
T0_MAT3 — Match output 3 of timer 0.
CAN1_RD — CAN1 receiver input.
R — Function reserved.
R — Function reserved.
ENET_TX_CLK (ENET_REF_CLK) — Ethernet
Transmit Clock (MII interface) or Ethernet Reference
Clock (RMII interface).
R — Function reserved.
R — Function reserved.
CLKOUT — Clock output pin.
R — Function reserved.
I2S0_RX_MCLK — I
master and received by the slave. Corresponds to
the signal SCK in the I
pin.
R — Function reserved.
ENET_TXD1 — Ethernet transmit data 1 (RMII/MII
interface).
T0_CAP2 — Capture input 2 of timer 0.
R — Function reserved.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
2
S receive master clock.
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
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