LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 39

• Manufacturer Part Number: LPC1850FET256
• Description: The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P9_6
PA_0
PA_1
PA_2
Pin description
L11
L12
J14
K15
x
x
x
x
…continued
-
-
-
-
136 -
103 72
126 -
134 -
All information provided in this document is subject to legal disclaimers.
Rev. 3.1 — 15 December 2011
-
-
-
-
[3]
[3]
[4]
[4]
I; PU I/O GPIO4[11] — General purpose digital input/output
I; PU -
I; PU I/O GPIO4[8] — General purpose digital input/output pin.
I; PU I/O GPIO4[9] — General purpose digital input/output pin.
O
O
-
-
I
-
I
-
-
-
-
O
O
-
I
-
O
-
-
-
-
I
-
I
-
-
-
-
Description
pin.
MCOB1 — Motor control PWM channel 1, output B.
USB1_PWR_FAULT — USB1 Port power fault signal
indicating over-current condition; this signal monitors
over-current on the USB1 bus (external circuitry
required to detect over-current condition).
R — Function reserved.
R — Function reserved.
ENET_COL — Ethernet Collision detect (MII
interface).
R — Function reserved.
U0_RXD — Receiver input for USART0.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
I2S1_RX_MCLK — I
CGU_OUT1 — CGU spare clock output 1.
R — Function reserved.
QEI_IDX — Quadrature Encoder Interface INDEX
input.
R — Function reserved.
U2_TXD — Transmitter output for USART2.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
QEI_PHB — Quadrature Encoder Interface PHB
input.
R — Function reserved.
U2_RXD — Receiver input for USART2.
R — Function reserved.
R — Function reserved.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
2
S1 receive master clock.
© NXP B.V. 2011. All rights reserved.
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