LPC1850FET256 NXP Semiconductors, LPC1850FET256 Datasheet - Page 27

• Manufacturer Part Number: LPC1850FET256
• Description: The LPC1850FET256 is a high-performance, cost-effective Cortex-M3 microcontroller featuring 200 kB of SRAM, and advanced peripherals including Ethernet, High Speed USB 2
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 3.
LCD, Ethernet, USB0, and USB1 functions are not available on all parts. See
LPC1850_30_20_10
Preliminary data sheet
Symbol
P5_4
P5_5
P5_6
P5_7
Pin description
P9
P10
T13
R12
x
x
x
x
…continued
-
-
-
-
81
89
91
80
All information provided in this document is subject to legal disclaimers.
57
58
63
65
Rev. 3.1 — 15 December 2011
-
-
-
-
[3]
[3]
[3]
[3]
I; PU I/O GPIO2[13] — General purpose digital input/output
I; PU I/O GPIO2[14] — General purpose digital input/output
I; PU I/O GPIO2[15] — General purpose digital input/output
I; PU I/O GPIO2[7] — General purpose digital input/output pin.
O
I/O EMC_D8 — External memory data line 8.
-
I
O
-
-
O
I/O EMC_D9 — External memory data line 9.
-
I
O
-
-
O
I/O EMC_D10 — External memory data line 10.
-
O
O
-
-
O
I/O EMC_D11 — External memory data line 11.
-
I
O
-
-
Description
pin.
MCOB0 — Motor control PWM channel 0, output B.
R — Function reserved.
U1_CTS — Clear to Send input for UART1.
T1_MAT0 — Match output 0 of timer 1.
R — Function reserved.
R — Function reserved.
pin.
MCOA1 — Motor control PWM channel 1, output A.
R — Function reserved.
U1_DCD — Data Carrier Detect input for UART1.
T1_MAT1 — Match output 1 of timer 1.
R — Function reserved.
R — Function reserved.
pin.
MCOB1 — Motor control PWM channel 1, output B.
R — Function reserved.
U1_TXD — Transmitter output for UART1.
T1_MAT2 — Match output 2 of timer 1.
R — Function reserved.
R — Function reserved.
MCOA2 — Motor control PWM channel 2, output A.
R — Function reserved.
U1_RXD — Receiver input for UART1.
T1_MAT3 — Match output 3 of timer 1.
R — Function reserved.
R — Function reserved.
Table
32-bit ARM Cortex-M3 microcontroller
LPC1850/30/20/10
2.
© NXP B.V. 2011. All rights reserved.
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